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PDF MAX14950 Data sheet ( Hoja de datos )

Número de pieza MAX14950
Descripción Quad PCI Express Equalizer/Redriver
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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EVALUATION KIT AVAILABLE
MAX14950
Quad PCI Express Equalizer/Redriver
General Description
The MAX14950 is a quad equalizer/redriver designed to
improve PCI Express® (PCIe) signal integrity by provid-
ing programmable input equalization at its receiver and
programmable redrive circuitry. The output circuitry re-
establishes deemphasis lost on the board and compen-
sates for circuit-board loss. The device permits optimal
placement of key PCIe components. The device is useful
with stripline, microstrip printed circuits, and balanced
100I cable.
The device is tailored for PCIe and features electrical idle
and receiver detection on each channel. It is optimized
for PCIe Gen III (8.0GT/s) and Gen II (5.0GT/s) data
rates, while still handling Gen I (2.5GT/s).
The MAX14950 is available in a small, lead-free, 42-pin
(3.5mm x 9.0mm) TQFN package for optimal layout and
minimal space requirements. The device is specified
over the 0NC to +70NC operating temperature range.
Applications
Servers
Storage
Desktop Computers/Notebook PCs
Communications Switchers
Features
S Optimized for Generation III (8.0GT/s) and
Generation II (5.0GT/s) with Generation I (2.5GT/s)
Compatibility
S Receive Detection Permits Completely
Transparent, Software-Free Operation
S Equalization Permits Placement of Up to 30in FR4
S PCIe Gen III (8.0GT/s)-Compliant Input/Output
Return Loss
S Electrical Idle Detection
S Very Low Latency: 160ps (typ) Propagation Delay
S Random Jitter P 0.5psRMS (typ)
S Deterministic Jitter P 10.5psP-P (typ)
S Four-Level-Programmable Input Equalization
S Eight-Level-Programmable Output Emphasis
S On-Chip 50I Input/Output Terminations
S Single +3.3V Supply Operation
S ±5kV Human Body Model (HBM) Protection On All
Pins
S Space-Saving: 3.5mm x 9.0mm TQFN Package
S Pin Compatible with MAX4950 PCIe Generation II
Redriver/Equalizer
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX14950CTO+
0NC to +70NC
42 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
PCI Express is a registered trademark of PCI-SIG Corp.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5715; Rev 1; 11/12

1 page




MAX14950 pdf
MAX14950
Quad PCI Express Equalizer/Redriver
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, CCL = 200nF coupling capacitor on each output, RL = 50I on each output, TA = 0NC to +70NC, unless oth-
erwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Note 3)
PARAMETER
Input Equalization, 16dB
AC PERFORMANCE (Note 4)
Output Common-Mode Voltage
Swing Peak-to-Peak
Propagation Delay
Rise/Fall Time
Rise/Fall Time Mismatch
Deterministic Jitter
SYMBOL
VRX-EQ-
16dB
CONDITIONS
INEQ1 = VCC, INEQ0 = VCC (Note 5)
VTX-CM-
AC-PP
tPD
tTX-RISE-
FALL
tTX-RF-
MISMATCH
tTX-DJ-DD
Max(VOUT_P + VOUT_N)/2
- Min(VOUT_P + VOUT_N)/2
(Note 6)
(Note 6)
K28.5 pattern, AC-coupled, RL = 50I,
data rate = 8GT/s
MIN TYP MAX UNITS
16 dB
100 mVP-P
120 160 240
ps
20 ps
5 ps
10.5 23.5 psP-P
Random Jitter
tTX-RJ-DD
D10.2 pattern, no deemphasis, no
preshoot, data rate = 8GT/s
0.5 1.5 psRMS
Electrical Idle Entry Delay
tTX-IDLE-
SET-TO-
IDLE
From input to output, D10.2 pattern,
data rate = 1GT/s
5 8 ns
Electrical Idle Exit Delay
tTX-IDLE-
TO-DIFF-
DATA
From input to output, D10.2 pattern,
data rate = 1GT/s
5 8 ns
Electrical Idle Detect Threshold
VTX-IDLE- D10.2 pattern, data rate = 1GT/s (Note 3)
THRESH D10.2 pattern, data rate = 1GT/s to 8GT/s
65
112
112
175 mVP-P
Output Voltage During Electrical
Idle (AC)
VTX-IDLE-
DIFF-AC-P
|(VOUT_P - VOUT_N)|
20 mVP-P
Receiver Detection Pulse
Amplitude
VTX-RCV- Voltage change in positive direction
DETECT
600 mV
Receiver Detection Pulse Width
150 ns
Receiver Detection Retry Period
300 ns
CONTROL LOGIC
Input Logic-Level Low
Input Logic-Level High
Input Logic Hysteresis
Input Pulldown Resistance
ESD PROTECTION
VIL
VIH
VHYST
RPD
0.6
1.4
0.1
200 250
V
V
V
kI
ESD Voltage
Human Body Model
±5 kV
Note 3: All units are 100% production tested at TA = +70NC. Specifications for all temperature limits are guaranteed by design.
Note 4: Guaranteed by design, unless otherwise noted.
Note 5: Equivalent to same amount of deemphasis driving the input.
Note 6: Rise and fall times are measured using 20% and 80% levels.
Maxim Integrated
  5

5 Page





MAX14950 arduino
MAX14950
Quad PCI Express Equalizer/Redriver
(TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
INEQ1 = 1, INEQ0 = 0, VIN = 500mVP-P,
OEQ2 = OEQ1 = OEQ0 = 0, 18in MICROSTRIP
ON INPUT, DATA RATE = 8GT/s
MAX14950 toc31
600
400
INEQ1 = 1, INEQ0 = 1, VIN = 500mVP-P,
OEQ2 = OEQ1 = OEQ0 = 0, 24in MICROSTRIP
ON INPUT, DATA RATE = 8GT/s
MAX14950 toc32
600
400
200 200
00
-200 -200
-400 -400
-600 -600
-100 -50 0 50 100
(ps)
INEQ0 = INEQ1 = 0, VIN = 200mVP-P,
0EQ2 = 0, OEQ1 = 0, OEQ0 = 1,
OUTPUT AFTER 19in STRIPLINE, DATA RATE = 8GT/s
MAX14950 toc33
300
200
10
0
-100
-200
-300
-100 -50 0 50 100
(ps)
-100 -50 0 50 100
(ps)
INEQ0 = INEQ1 = 0, VIN = 200mVP-P,
0EQ2 = 1, OEQ1 = 1, OEQ0 = 1,
OUTPUT AFTER 19in STRIPLINE, DATA RATE = 8GT/s
300
MAX14950 toc34
200
10
0
-100
-200
-300
-100 -50
0
50 100
(ps)
INEQ0 = INEQ1 = 0, VIN = 200mVP-P,
0EQ2 = 1, OEQ1 = 1, OEQ0 = 0,
OUTPUT AFTER 19in STRIPLINE, DATA RATE = 8GT/s
MAX14950 toc35
250
200
150
100
50
0
-50
-100
-150
-200
-250
-100 -50 0 50 100
(ps)
Maxim Integrated
INEQ0 = INEQ1 = 0, VIN = 200mVP-P,
0EQ2 = 1, OEQ1 = 0, OEQ0 = 1,
OUTPUT AFTER 19in STRIPLINE, DATA RATE = 8GT/s
300
MAX14950 toc36
200
10
0
-100
-200
-300
-100 -50 0 50 100
(ps)
  11

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