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PDF MAX11162 Data sheet ( Hoja de datos )

Número de pieza MAX11162
Descripción SAR ADC
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX11162 Hoja de datos, Descripción, Manual

EVALUATION KIT AVAILABLE
MAX11162
16-Bit, 500ksps, +5V Unipolar Input,
SAR ADC, in Tiny 10-Pin µMAX
General Description
The MAX11162 is a 16-bit, 500ksps, +5V unipolar pseudo-
differential input SAR ADC offering excellent AC and DC
performance in a small standard package.
This ADC typically achieves 93.6dB SNR, -106dB THD,
and ±0.5 LSB INL, ±0.2 LSB DNL. The MAX11162
guarantees 16-bit no-missing codes.
The MAX11162 communicates using an SPI-compatible
serial interface at 2.5V, 3V, 3.3V, or 5V logic.
The serial interface can be used to daisy-chain multiple
ADCs for multichannel applications and provides a busy
indicator option for simplified system synchronization and
timing.
The MAX11162 is offered in a 10-pin, 3mm x 5mm,
µMAXM package and is specified over the -40NC to +85NC
temperature range.
Applications
● Industrial Process Control
● Medical Instrumentation
● Test and Measurements
● Automatic Test Equipment
● Narrowband Receivers
Selector Guide and Ordering Information appear at end of
data sheet.
Benefits and Features
● High DC/AC Accuracy Improves Measurement
Quality
• 16-Bit Resolution with No Missing Codes
• 500ksps Throughput Rates Without Pipeline Delay/
Latency
• 93.6dB SNR and -106dB THD at 10kHz
• 0.47 LSBRMS Input-Referred Noise
• ±0.2 LSB DNL (typ) and ±0.5 LSB INL (typ)
● Wide Supply Range and Low Power Simplify Power-
Supply Design
• 5V Analog Supply
• 2.3V to 5V Digital Supply
• 24mW Power Consumption at 500ksps
10μA in Shutdown Mode
● Multi-Industry Standard Serial Interface and Small
Package Reduces Size
• SPI/QSPI™/MICROWIRE®/DSP-Compatible
Serial Interface
3mm x 5mm, Tiny 10-Pin μMAX Package
μMAX is registered trademark of Maxim Integrated Products, Inc.
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corporation.
Typical Operating Circuit
VDD
(5V)
1µF
VOVDD
(2.3V TO 5V)
1µF
0 TO +5V
MAX9632
10Ω
4.7nF, COG
Ceramic
AIN+
AIN-
REF
10µF
REF
16-BIT ADC
INTERFACE AND CONTROL
SCLK
SDI
SDO
CNVST
HOST
CONTROLLER
MAX11162
GND
16-Bit to 18-Bit SAR ADC Family
±5V/REF
0 to 5V/
REF
0 to 5V
16 BIT/
250ksps
MAX11167
MAX11169
MAX11165
MAX11161
MAX11163
16 BIT/
500ksps
MAX11166
MAX11168
MAX11164
MAX11160
MAX11162
18 BIT/
500ksps
MAX11156
MAX11158
MAX11154
MAX11150
MAX11152
19-6855 Rev 1; 1/15

1 page




MAX11162 pdf
MAX11162
16-Bit, 500ksps, +5V Unipolar Input,
SAR ADC, in Tiny 10-Pin µMAX
Electrical Characteristics (continued)
(VDD = 4.75V to 5.25V, VOVDD = 2.3V to 5.25V, fSAMPLE = 500kHz, VREF = 5V; TA = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = +25NC.) (Note 2)
PARAMETER
SDI Valid Setup Time from CNVST
Rising Edge
SYMBOL
CONDITIONS
tSSDISCK 4-wire CS mode
SDI Valid Hold Time from SCLK
Rising Edge
tHSDISCK 4-wire CS mode
SCLK Valid Setup Time from CNVST
Rising Edge
tSSCKCNV
Daisy-chain mode
SCLK Valid Hold Time from CNVST
Rising Edge
tHSCKCNV Daisy-chain mode
SDI Valid Setup Time from SCLK
Falling Edge
tSSDISCK Daisy-chain mode
SDI Valid Hold Time from SCLK
Falling Edge
tHSDISCK Daisy-chain mode
SDI High to SDO High
tDSDOSDI
Daisy-chain mode with busy indicator,
VOVDD > 4.5V
Daisy-chain mode with busy indicator,
VOVDD > 2.3V
MIN TYP MAX UNITS
5 ns
0 ns
5 ns
0 ns
6 ns
0 ns
15
ns
20
Note 2: Maximum and minimum limits are fully production tested over the specified supply voltage range and at a temperature of
+25°C and +85°C. Limits below +25°C are guaranteed by design and device characterization.
Note 3: See the Analog Inputs and Overvoltage Input Clamps sections.
Note 4: See the Definitions section.
Note 5: Defined as the change in positive full-scale code transition caused by a Q5% variation in the VDD supply voltage.
Note 6: 10kHz sine wave input, -0.1dB below full scale.
Note 7: See Table 4 for definition of the reference modes.
Note 8: fIN1 ~ 9.4kHz, fIN2 ~ 10.7kHz, Each tone at -6.1dB below full scale.
Note 9: CLOAD = 65pF on SDO.
www.maximintegrated.com
Maxim Integrated 5

5 Page





MAX11162 arduino
MAX11162
Pin Configuration
16-Bit, 500ksps, +5V Unipolar Input,
SAR ADC, in Tiny 10-Pin µMAX
TOP VIEW
REF
VDD
AIN+
AIN-
GND
1+
2
3 MAX11162
4
5
10
9
8
7
6
µMAX
OVDD
SDI
SCLK
SDO
CNVST
Pin Description
PIN NAME
FUNCTION
1
REF
External Reference Input. Bypass to GND in close proximity with a X5R or X7R 10μF 16V chip. See the
Layout, Grounding, and Bypassing section.
2
VDD
Analog Power Supply. Bypass VDD to GND with a 0.1µF capacitor as close as possible to each device and
one 10µF capacitor per board.
3 AIN+ Positive Analog Input
4 AIN- Negative Analog Input. Connect AIN- to the analog ground plane or to a remote sense ground.
5 GND Power-Supply Ground
Conversion Start Input. The rising edge of CNVST initiates the conversions and selects the interface mode:
6 CNVST daisy-chain or CS. In CS mode, set CNVST low to enable the SDO output. In daisy-chain mode, read the data
when CNVST is high.
7 SDO Serial Data Output. SDO transitions on the falling edge of SCLK.
8 SCLK Serial Clock Input. Clocks data out of the serial interface when the device is selected.
Serial Data Input and Mode Select Input. Daisy-chain mode is selected if SDI is low during the CNVST rising
edge. In this mode, SDI is used as a data input to daisy-chain the conversion results of two or more ADCs
9 SDI onto a single SDO line. CS mode is selected if SDI is high during the CNVST rising edge. In this mode, either
SDI or CNVST can enable the serial output signals when low. If SDI or CNVST is low when the conversion is
completed, the busy indicator feature is enabled.
10
OVDD
Digital Power Supply. OVDD can range from 2.3V to VDD. Bypass OVDD to GND with a 0.1µF capacitor for
each device and one 10µF per board.
www.maximintegrated.com
Maxim Integrated 11

11 Page







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