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PDF EM6A8160 Data sheet ( Hoja de datos )
| Número de pieza | EM6A8160 | |
| Descripción | 4M x 16 DDR Synchronous DRAM | |
| Fabricantes | Etron Technology | |
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EtronTech
EM6A8160
4M x 16 DDR Synchronous DRAM (SDRAM)
Preliminary (Rev. 1.1, Oct. /2015)
Features
• Fast clock rate: 200/250 MHz
• Differential Clock CK & CK
• Bi-directional DQS
• DLL enable/disable by EMRS
• Fully synchronous operation
• Internal pipeline architecture
• Four internal banks, 1M x 16-bit for each bank
• Programmable Mode and Extended Mode Registers
- CAS Latency: 2, 2.5, 3
- Burst length: 2, 4, 8
- Burst Type: Sequential & Interleaved
• Individual byte writes mask control
• DM Write Latency = 0
• Auto Refresh and Self Refresh
• 4096 refresh cycles / 64ms
• Precharge & active power down
• Power supplies: VDD & VDDQ = 2.5V ± 0.2V
• Operating temperature: TA = 0~70°C
• Interface: SSTL_2 I/O Interface
• Package: 66 Pin TSOP II, 0.65mm pin pitch
- Pb free and Halogen free
• Package: 60-Ball, 8x13x1.2 mm (max) FBGA
- Pb free and Halogen Free
Overview
The EM6A8160 SDRAM is a high-speed CMOS
double data rate synchronous DRAM containing 64
Mbits. It is internally configured as a quad 1M x 16
DRAM with a synchronous interface (all signals are
registered on the positive edge of the clock signal,
CK). Data outputs occur at both rising edges of CK
and CK . Read and write accesses to the SDRAM
are burst oriented; accesses start at a selected
location and continue for a programmed number of
locations in a programmed sequence. Accesses
begin with the registration of a BankActivate command
which is then followed by a Read or Write command.
The EM6A8160 provides programmable Read or
Write burst lengths of 2, 4, 8. An auto precharge
function may be enabled to provide a self-timed row
precharge that is initiated at the end of the burst
sequence. The refresh functions, either Auto or Self
Refresh are easy to use. In addition, EM6A8160
features programmable DLL option. By having a
programmable mode register and extended mode
register, the system can choose the most suitable
modes to maximize its performance. These devices
are well suited for applications requiring high memory
bandwidth and high performance.
Table 1. Ordering Information
Part Number
Clock Frequency Data Rate
EM6A8160TSC-4G
250MHz
500Mbps/pin
EM6A8160TSC-5G
200MHz
400Mbps/pin
EM6A8160BKC-4H
250MHz
500Mbps/pin
EM6A8160BKC-5H
200MHz
400Mbps/pin
TS: indicates TSOP II Package
BK: indicates 8x13x1.2mm FBGA Package
C: indicates Generation Code
G: indicates Pb and Halogen Free for TSOPII Package
H: indicates Pb and Halogen Free for FBGA Package
Power Supply
VDD 2.5V, VDDQ 2.5V
VDD 2.5V, VDDQ 2.5V
VDD 2.5V, VDDQ 2.5V
VDD 2.5V, VDDQ 2.5V
Package
TSOPII
TSOPII
FBGA
FBGA
Etron Technology, Inc.
No. 6, Technology Rd. V, Hsinchu Science Park, Hsinchu, Taiwan 30078, R.O.C.
TEL: (886)-3-5782345 FAX: (886)-3-5778671
Etron Technology, Inc. reserves the right to change products or specification without notice.
1 page  
EtronTech
EM6A8160
VSS
VDDQ
VSSQ
VREF
NC
Supply Ground
Supply DQ Power: +2.5V ± 0.2V. Provide isolated power to DQs for improved noise immunity.
Supply DQ Ground: Provide isolated ground to DQs for improved noise immunity.
Supply Reference Voltage for Inputs: +0.5*VDDQ
- No Connect: No internal connection, these pins suggest to be left unconnected.
Rev. 1.1 5 Oct. /2015
5 Page 
EtronTech
EM6A8160
Table 12. Absolute Maximum Rating
Symbol
Item
Values
Unit
VI/O Voltage on I/O Pins Relative to Vss
- 0.5 ~ VDDQ + 0.5
V
VDD, VDDQ Voltage on VDD, VDDQ Supply Relative to Vss
- 1 ~ 3.6
V
VIN Voltage on Inputs Relative to Vss
- 1 ~ 3.6
V
TA Ambient Temperature
0 ~ 70
°C
TSTG Storage Temperature
- 55 ~ 150
°C
PD Power Dissipation
1W
IOS Short Circuit Output Current
50 mA
Note: Absolute maximum DC requirements contain stress ratings only. Functional operation at the absolute
maximum limits is not implied or guaranteed. Extended exposure to maximum ratings may affect device
reliability.
Table 13. Recommended D.C. Operating Conditions (VDD = 2.5V ± 0.2V, TA = 0~70 °C)
Symbol
VDD
VDDQ
VREF
VTT
VIH (DC)
VIL (DC)
VIN (DC)
Parameter
Power Supply Voltage
Power Supply Voltage (for I/O Buffer)
Input Reference Voltage
Termination Voltage
Input High Voltage (DC)
Input Low Voltage (DC)
Input Voltage Level, CK and CK inputs
Min.
2.3
2.3
0.49* VDDQ
VREF - 0.04
VREF + 0.15
-0.3
-0.3
Max.
2.7
2.7
0.51* VDDQ
VREF + 0.04
VDDQ + 0.3
VREF – 0.15
VDDQ + 0.3
VID (DC)
IIL
IOZ
IOH
IOL
Input Different Voltage, CK and CK inputs
Input leakage current
Output leakage current
Output High Current (VOH = 1.95V)
Output Low Current (VOL = 0.35V)
0.36
-2
-5
-16.2
16.2
VDDQ + 0.6
2
5
-
-
Unit
V
V
V
V
V
V
V
V
µA
µA
mA
mA
Table 14. Capacitance (VDD = 2.5V, f = 1MHz, TA = 25 °C)
Symbol
Parameter
CIN1 Input Capacitance (CK, CK )
CIN2 Input Capacitance (All other input-only pins)
CI/O DM, DQ, DQS Input/Output Capacitance
TSOP FBGA
Min.
2 1.5
2 1.5
4 3.5
TSOP FBGA
Max.
3 2.5
3 2.5
5 4.5
Delta
0.25
0.5
0.5
Note: These parameters are guaranteed by design, periodically sampled and are not 100% tested.
Unit
pF
pF
pF
pF
Rev. 1.1 11 Oct. /2015
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet EM6A8160.PDF ] | |
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