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PDF BD8256EFV-M Data sheet ( Hoja de datos )
| Número de pieza | BD8256EFV-M | |
| Descripción | 9ch System Motor Driver | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
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Datasheet
System Motor Driver Series for CD・DVD・BD Player
9ch System Motor Driver
For Car AV
BD8256EFV-M
General Description
BD8256EFV-M is a 9ch motor driver developed for
driving coil actuator (3ch), sled motor (2ch), a loading
motor, and a three-phase motor for spindle. This chip
has a built-in 2ch LVDS (Low Voltage Differential
Signaling) output for spherical aberration. This can drive
the motor and coil of blu-ray drive.
It has a built-in Serial Peripheral Interface (SPI) with a
max clock frequency of 35MHz, for interfacing with the
Micro-controller.
Features
Built-in Serial Peripheral Interface(SPI)
High efficiency at 180° PWM for spindle driver
Built-in 2-channel stepping motor driver for sled
Built-in actuator over current protection circuit
Built-in loading driver short-circuit protection
AEC-Q100 Qualified
Applications
Car navigation
Car AV
Typical Application Circuit
PREVCC
Key Specifications
Ron(Spindle):
Ron(Loading):
Power Supply Voltage Range:
1.0Ω(Typ)
1.5Ω(Typ)
4.5V to 10.5V
Package
HTSSOP-B54
W(Typ) × D(Typ) × H(Max)
18.50mm × 9.50mm × 1.00mm
HTSSOP-B54
VCC
VCC
PREVCC
PREGND
SPGND
SLGND
ACTGND
BD8256EFV-M
PREVCC
VCC
SHV
MM
SHV
Figure 1. Typical Application Circuit
SHV
SHV
○Product structure：Silicon monolithic integrated circuit
.www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product is not designed protection against radioactive rays
1/49
TSZ02201-0G1G0BK00030-1-2
4.Apr.2016 Rev.004
1 page  
BD8256EFV-M
Electrical Characteristics (Unless otherwise specified, Ta=-40°C~90°C, VVCC=VSPRNF=VSLRNF1=VSLRNF2=8V,
VPREVCC=VTKRNF=VFCTLRNF=5V, VSHV=3.3V, RSPRNF=0.33Ω, RSLRNF=0.56Ω)
Parameter
Symbol
Min.
Limits
Typ
Max.
Unit
Conditions
Circuit Current
PREVCC Quiescent Current
VCC Quiescent Current
PREVCC Standby Current
VCC Standby Current
IQ1 -
IQ2 -
IST1 -
IST2 -
18 36 mA MUTEB=High
7 14 mA SPI=72h FE, 70h FE
3
1
6
2
mA
mA
MUTEB=Low
Spindle Driver
Hall Bias Voltage
Input Bias Current
VHB 0.45 0.9 1.35
V IHB=10mA
IHIB - 0.5 3 μA
Input Level
Common Mode Input Range
Input Dead Zone (One Side)
Input-Output Gain
Output ON Resistance (Total Sum)
Output limit Current
PWM Frequency
FG Output Low Level Voltage
VHIM
VHICM
VDZSP
gmSP
RONSP
ILIMSP
fOSC
VFGL
50
1.5
0
0.85
-
0.85
-
-
-
-
10
1.24
1
1.06
100
0.1
-
3.8
45
1.63
1.8
1.27
-
0.3
mVpp
V
mV
A/V
Ω
A
kHz
V
RSPRNF=0.33Ω, RL=2Ω
IL=500mA
RSPRNF=0.33Ω
RL=2Ω
33KΩ pull-up(3.3V)
Sled Motor Driver
Input Dead Zone (One Side)
Input-Output Gain
Output ON Resistance (Total sum)
Output Limit Current
PWM Frequency
VDZSL
gmSL
RONSL
ILIMSL
fOSC
3
0.84
-
0.79
-
15
1.10
2.2
0.93
100
35
1.36
3.3
1.07
-
mV
A/V RSLRNF1,2=0.56Ω, RL=8Ω
Ω IL=500mA
A RSLRNF1,2=0.56Ω
kHz RL=8Ω
Actuator Driver
Output Offset Voltage
Output ON Resistance
Voltage Gain 1
Voltage Gain 2
Loading Driver
Output Offset Voltage
Output ON Resistance
Voltage Gain 1
Voltage Gain 2
Actuator Protection Circuit
VOFACT
RONACT
GVACT1
GVACT2
VOFLD
RONLD
GVLD1
GVLD2
-50
-
9.4
15.4
-110
-
14.1
15.6
0
1.5
11.7
17.7
0
1.5
17.2
18.7
50
2.0
13.5
19.5
110
2.5
19.5
21.0
mV Low Gain mode, RL=8Ω
Ω IL=500mA
dB Low Gain mode, RL=8Ω
dB High Gain mode, RL=8Ω
mV Low Gain mode, RL=8Ω
Ω IL=500mA
dB Low Gain mode, RL=8Ω
dB High Gain mode, RL=8Ω
PRTT/PRTF Default Voltage
VPRTREF
0.98
1.06
1.14
V
PRTT/PRTF Protect Detection Voltage
VPRTDET
2.65
2.95
3.25
V
PRTLIM Voltage
VPRTLIM
490
530
570
mV
Detection Input Offset Voltage
Protect Sign Output
VOFDET
-7
0
7 mV
PRTOUT Low Level Output Voltage
ERROUT Low Level Output Voltage
VOL1
VOL2
-
-
0.1 0.3
0.1 0.3
V 33kΩ pull-up(3.3V)
V 33kΩ pull-up(3.3V)
Logic Inputs (SDI,SCLK,SLV,MUTEB)
Low Level Input Voltage
VINL
-
- 0.5 V
High Level Voltage
High Level Current
(SDI,SCLK,MUTEB)
Low Level Current (SLV)
Function
VINH
2.2
-
-V
IINH -
33 75 μA SDI,SCLK,MUTEB=3.3V
IINL -75 -30 - μA SLV=0V
VCC Drop Mute Voltage
VMVCC
3.4
3.8
4.2
V
LVDS Output
Difference Movement Output Voltage
Offset Voltage
VOD
VOC
250
0.95
-
1.25
950
1.55
mV RL=100Ω
V RL=100Ω
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/49
TSZ02201-0G1G0BK00030-1-2
4.Apr.2016 Rev.004
5 Page 
BD8256EFV-M
3. Details of Control Registers
Functions of each register are as shown below.
・ REG 70h OUTPUT_EN1 (Read / Write)
Each driver output settings (Hi-Z/Active) can be changed in REG 70h.
Bit
Name
Default
7 FCTL1_OUTEN
0
6 FCTL2_OUTEN
0
5 TK_OUTEN
0
4 SL_OUTEN
0
3 SA_OUTEN
0
2 SP_OUTEN
0
1 LD_OUTEN
0
0 N/A
0
Function
FCTL1 Output Enable
FCTL2 Output Enable
TK Output Enable
SL1,SL2 Output Enable
SA1,SA2 Output Enable
SP Output Enable
LD Output Enable
-
Set "0"
Disable
Disable
Disable
Disable
Disable
Disable
Disable
-
Set "1"
Enable
Enable
Enable
Enable
Enable
Enable
Enable
-
Reset
A
A
A
A
A
A
A
-
・ REG 71h -
Bit
Name
Default
7-
-
6-
-
5-
-
4-
-
3-
-
2-
-
1-
-
0-
-
Function
-
-
-
-
-
-
-
-
Set "0"
-
-
-
-
-
-
-
-
Set "1"
-
-
-
-
-
-
-
-
Reset
-
-
-
-
-
-
-
-
・ REG 72h POWER_SAVE1 (Read / Write)
Power save mode settings for each block can be set in REG 72h.
Power save mode makes the output Hi-Z and turns OFF the internal circuit to reduce the current consumption.
Bit
Name
Default
7 FCTL1_PSB
0
6 FCTL2_PSB
0
5 TK_PSB
0
4 SL_PSB
0
3 SA_PSB
0
2 SP_PSB
0
1 LD_PSB
0
0 N/A
0
Function
FCTL1 Block Power Save
FCTL2 Block Power Save
TK Block Power Save
SL1,SL2 Block Power Save
SA1,SA2 Block Power Save
SP Block Power Save
LD Block Power Save
-
Set "0"
Enable
Enable
Enable
Enable
Enable
Enable
Enable
-
Set "1"
Disable
Disable
Disable
Disable
Disable
Disable
Disable
-
Reset
A
A
A
A
A
A
A
-
www.rohm.com
© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/49
TSZ02201-0G1G0BK00030-1-2
4.Apr.2016 Rev.004
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet BD8256EFV-M.PDF ] | |
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