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PDF KSZ8091MLX Data sheet ( Hoja de datos )

Número de pieza KSZ8091MLX
Descripción 10Base-T/100Base-TX Physical Layer Transceiver
Fabricantes Micrel Semiconductor 
Logotipo Micrel Semiconductor Logotipo



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No Preview Available ! KSZ8091MLX Hoja de datos, Descripción, Manual

KSZ8091MLX
10Base-T/100Base-TX
Physical Layer Transceiver
Revision 1.2
General Description
The KSZ8091MLX is a single-supply 10Base-T/100Base-
TX Ethernet physical layer transceiver for transmission
and reception of data over standard CAT-5 unshielded
twisted pair (UTP) cable.
The KSZ8091MLX is a highly-integrated, compact solution.
It reduces board cost and simplifies board layout by using
on-chip termination resistors for the differential pairs, by
integrating a low-noise regulator to supply the 1.2V core,
and by offering a flexible 1.8/2.5/3.3V digital I/O interface.
The KSZ8091MLX offers the Media Independent Interface
(MII) for direct connection with MII-compliant Ethernet
MAC processors and switches.
Energy Efficient Ethernet (EEE) provides further power
saving during idle traffic periods and Wake-on-LAN (WOL)
provides a mechanism for the KSZ8091MLX to wake up a
system that is in standby power mode.
The KSZ8091MLX is available in the 48-pin, lead-free
LQFP package (see Ordering Information).
Datasheets and support documentation are available on
website at: www.micrel.com.
Features
Single-chip 10Base-T/100Base-TX IEEE 802.3
compliant Ethernet transceiver
MII interface support
Back-to-back mode support for a 100Mbps copper
repeater
MDC/MDIO management interface for PHY register
configuration
Programmable interrupt output
LED outputs for link, activity and speed status indication
On-chip termination resistors for the differential pairs
Baseline wander correction
HP Auto MDI/MDI-X to reliably detect and correct
straight-through and crossover cable connections with
disable and enable option
Auto-Negotiation to automatically select the highest link-
up speed (10/100Mbps) and duplex (half/full)
Energy Efficient Ethernet (EEE) support with low-power
idle (LPI) mode and clock stoppage for 100Base TX and
transmit amplitude reduction with 10Base-Te option
Wake-On-LAN (WOL) support with either magic packet,
link status change, or robust custom-packet detection
LinkMD® TDR-based cable diagnostics to identify faulty
copper cabling
Functional Diagram
LinkMD is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
August 31, 2015
Revision 1.2

1 page




KSZ8091MLX pdf
Micrel, Inc.
KSZ8091MLX
Wake-On-LAN ....................................................................................................................................................................... 32
Magic-Packet Detection..................................................................................................................................................... 32
Customized-Packet Detection ........................................................................................................................................... 32
Link Status Change Detection ........................................................................................................................................... 33
Reference Circuit for Power and Ground Connections......................................................................................................... 34
Typical Current/Power Consumption .................................................................................................................................... 35
Transceiver (3.3V), Digital I/Os (3.3V) .............................................................................................................................. 35
Transceiver (3.3V), Digital I/Os (2.5V) .............................................................................................................................. 35
Transceiver (3.3V), Digital I/Os (1.8V) .............................................................................................................................. 36
Register Map ......................................................................................................................................................................... 37
Standard Registers ............................................................................................................................................................... 39
IEEE-Defined Registers – Descriptions............................................................................................................................. 39
Vendor-Specific Registers – Descriptions ......................................................................................................................... 44
MMD Registers...................................................................................................................................................................... 49
MMD Registers – Descriptions .......................................................................................................................................... 51
Absolute Maximum Ratings .................................................................................................................................................. 56
Operating Ratings ................................................................................................................................................................. 56
Electrical Characteristics....................................................................................................................................................... 56
Timing Diagrams ................................................................................................................................................................... 58
MII SQE Timing (10Base-T) .............................................................................................................................................. 58
MII Transmit Timing (10Base-T)........................................................................................................................................ 59
MII Receive Timing (10Base-T)......................................................................................................................................... 60
MII Transmit Timing (100Base-TX) ................................................................................................................................... 61
MII Receive Timing (100Base-TX) .................................................................................................................................... 62
Auto-Negotiation Timing .................................................................................................................................................... 63
MDC/MDIO Timing ............................................................................................................................................................ 64
Power-Up/Reset Timing .................................................................................................................................................... 65
Reset Circuit.......................................................................................................................................................................... 66
Reference Circuits – LED Strap-In Pins................................................................................................................................ 67
Reference Clock – Connection and Selection ...................................................................................................................... 68
Magnetic – Connection and Selection .................................................................................................................................. 69
Package Information and Recommended Land Pattern ....................................................................................................... 71
August 31, 2015
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KSZ8091MLX arduino
Micrel, Inc.
KSZ8091MLX
Pin Description (Continued)
Pin Number
34
35
36
37
38
39
Pin Name
TXEN
TXD0
TXD1
GND
TXD2
TXD3
Type(2)
I
I
I
GND
I
I
COL/
40 Ipd/O
CONFIG0
CRS/
41 Ipd/O
CONFIG1
Pin Function
MII Mode: MII Transmit Enable input
MII Mode: MII Transmit Data Input[0](4)
MII Mode: MII Transmit Data Input[1](4)
Ground.
MII Mode: MII Transmit Data Input[2](4)
MII Mode: MII Transmit Data Input[3](4)
MII Mode: MII Collision Detect output
Config. Mode: The pull-up/pull-down value is latched as CONFIG0 at the de-assertion
of reset. See the Strapping Options section for details.
MII Mode: MII Carrier Sense output
Config. Mode: The pull-up/pull-down value is latched as CONFIG1 at the de-assertion
of reset. See the Strapping Options section for details.
LED Output: Programmable LED0 Output.
PME_N Output: Programmable PME_N Output (pin option 1)
In this mode, this pin has a weak pull-up, is an open-drain, and requires an external
1.0kΩ pull-up resistor to VDDIO (digital VDD).
Config. Mode: Latched as auto-negotiation enable (Register 0h, Bit [12]) at the de-
assertion of reset. See the Strapping Options section for details.
The LED0 pin is programmable using Register 1Fh, Bits [5:4], and is defined as follows.
LED0/
PME_N1/
LED Mode = [00]
Link/Activity
Pin State
LED Definition
42
Ipu/O
No Link
High
OFF
Link Low ON
NWAYEN
Activity
Toggle
Blinking
LED Mode = [01]
Link Pin State
No Link
High
Link Low
LED Definition
OFF
ON
LED Mode = [10], [11] Reserved
Note:
4. MII TX Mode: The TXD[3:0] bits are synchronous with TXC. When TXEN is asserted, TXD[3:0] presents valid data from the MAC.
August 31, 2015
11
Revision 1.2

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