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PDF BD93291EFJ Data sheet ( Hoja de datos )

Número de pieza BD93291EFJ
Descripción Dual Synchronous Buck Converter
Fabricantes ROHM Semiconductor 
Logotipo ROHM Semiconductor Logotipo



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Datasheet
Dual Synchronous Buck Converter
BD93291EFJ
Description
The BD93291EFJ is a dual synchronous buck converter.
It integrates wide input voltage range (8.0V to 26V) synchronous
buck converter and low input voltage (Vout1 : 5.0V)
synchronous buck converter.
The IC also incorporates a new technology called
H3RegTM, a Rohm proprietary control method which
facilitates ultra-high transient response against changes in
load. SLLM (Simple Light Load Mode) technology is also
integrated to improve efficiency when powering lighter
loads. For protection and ease of use, the IC also
incorporates soft start.
Space-saving and high efficient switching regulator can be
achieved due to built-in N-MOSFET power transistor in
HTSOP-J8 package.
Applications
Distributed Power System
Pre-Regulator for Linear Regulator
Typical Application Circuit
VOUT2 C_UP
R_DW
R_UP
C_CO2
L2
C_CO3
Thermal Pad
(to be shorted to GND)
Features
Dual Synchronous Buck Converter in small package.
standby mode ( Istandby = 0uA )
High Voltage Synchronous Buck Converter(Vout1)
- Wide input range(8.0V to 26V) *absolute voltage 30V
- H3RegTM DC/DC Converter Controller included
- Output Current 1.7A *1
- FET on resistance High-side 0.175Ω/Low-side 0.175Ω
- Internal soft-start function
- Switching Frequency 300 to 600kHz
(*According to input/output conditions)
- Fixed output voltage (5.0V ± 1.5%; Normal Mode)
Low Voltage Synchronous Buck Converter(Vout2)
- Input voltage range 5.0V(VOUT1)
- H3RegTM DC/DC Converter Controller included
- Output Current 0.5A *1
- FET on resistance High-side 0.25Ω/Low-side 0.25Ω
- Internal soft-start function
- Switching Frequency 1.5M to 2.5MHz
(*According to input/output conditions)
- Feedback voltage (0.8V ± 1.5%; Normal Mode)
Protection Circuits
Under Voltage Lockout Protection
Thermal Shutdown
Over Current Protection
HTSOP-J8 Package with Exposed thermal PAD.
*1 Vout1 maximum output current capability is 2.5A, and
Vout2 maximum output current capability is 1.5A with the
optimal PCB power consumption design.
Structure
Silicon Monolithic Integrated Circuit
Package
HTSOP-J8
6.00mm x 4.90mm x 1.00mm
PIN Configuration (TOP VIEW)
VOUT1
C_CO1
L1
C_BS
C_VC1
BD93291EFJ
Product structureSilicon monolithic integrated circuit
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
This product is not designed protection against radioactive rays
1/21
TSZ02201-0323AAJ00300-1-2
12. Nov. 2012 Rev.001

1 page




BD93291EFJ pdf
BD93291EFJ
Datasheet
Typical Performance Curves (Unless otherwise noted Ta=25, VIN=14V, VOUT1=5V, VOUT2=3.3V)
100
95
90
85
80
75
70
65
60
55
50
10
100 1000
Iout1 [mA]
10000
100
95
90
85
80
75
70
65
60
55
50
10
100 1000
Iout2 [mA]
10000
Figure 4. VOUT1 Efficiency
(VIN=14V, L=22H)
Figure 5. VOUT2 Efficiency
(VOUT1=5V, VOUT2=3.3V, L=2.2H)
VOUT1(AC)
50mV/div
SW
5V/div
ISW
1A/div
1sec/div
VOUT2(AC)
10mV/div
SWL
2V/div
ISWL
1A/div
1sec/div
Figure 6. VOUT1 Ripple voltage
(VIN=14V, L1=22H, COUT1=22F, Iout=1A)
Figure 7. VOUT2 Ripple voltage
(VOUT1=5V, VOUT2=3.3V, L2=2.2H, COUT2=22F,
Iout=0.3A)
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
5/21
TSZ02201-0323AAJ00300-1-2
12. Nov. 2012 Rev.001

5 Page





BD93291EFJ arduino
BD93291EFJ
Datasheet
Timing Chart
1. Soft Start Function
Soft start is utilized when the EN pin is set high. Current control takes effect at startup, enabling a moderate “ramping start”
on the output voltage. Soft start time of VOUT1 is 5.0msec (typ) and VOUT2 is 2.5ms (typ).
EN
VOUT1
VOUT2
5.0ms (typ)
2.5V (typ)
2.5ms (typ)
5V(fixed)
3.3V
Figure 23. Soft Start Timing Chart
Protection Operation
1. OCP Operation
Normally, when FB voltage falls below REF voltage, HG becomes high. However, if the peak current through the inductor
(IL) exceeds OCP current value (IOCP) during HG=ON, HG become OFF immediately and IL is restricted by IOCP. As the result,
the output voltage can decrease as the frequency and duty are changed.
When OCP is released in the state that the output has decreased by OCP operation, the output voltage might rise up due to
high-speed load response.
Figure 24. OCP Timing Chart
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
11/21
TSZ02201-0323AAJ00300-1-2
12. Nov. 2012 Rev.001

11 Page







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