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PDF DM9013 Data sheet ( Hoja de datos )
| Número de pieza | DM9013 | |
| Descripción | 10/100 Mbps 3-port Ethernet Switch Controller | |
| Fabricantes | DAVICOM | |
| Logotipo |  |
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DAVICOM Semiconductor, Inc.
DM9013
10/100 Mbps 3-port Ethernet Switch Controller
with General Processor Interface
DATA SHEET
Preliminary
Version: DM9013--DS-P03
April 9, 2009
1 page  
DM9013
3-port switch with Processor Interface
6.41 Per Port Control/Status Index Register (60H)........................................................................................... 28
6.42 Per Port Control Data Register (61H) ........................................................................................................ 28
6.43 Per Port Status Data Register (62H) .......................................................................................................... 29
6.44 Per Port Forward Control Register (65H) .................................................................................................. 29
6.45 Per Port Ingress/Egress Control Register (66H) ...................................................................................... 30
6.46 Bandwidth Control Setting Register (67H)................................................................................................ 31
6.47 Per Port Block Unicast ports Control Register (68H) .............................................................................. 31
6.48 Per Port Block Multicast ports Control Register (69H)............................................................................ 31
6.49 Per Port Block Broadcast ports Control Register (6AH) ......................................................................... 31
6.50 Per Port Block Unknown ports Control Register (6BH) .......................................................................... 32
6.51 Per Port Priority Queue Control Register (6DH)....................................................................................... 32
6.52 Per Port VLAN Tag Low Byte Register (6EH) ........................................................................................... 32
6.53 Per Port VLAN Tag High Byte Register (6FH)........................................................................................... 32
6.54 MIB counter Port Index Register (80H)...................................................................................................... 32
6.55 MIB counter Data Register (81H~84H)....................................................................................................... 32
6.56 Port-based VLAN mapping table Registers (B0H~BFH).......................................................................... 33
6.57 TOS Priority Map Registers (C0H~CFH).................................................................................................... 33
6.58 VLAN Priority Map Registers (D0H~D1H) ................................................................................................. 36
6.59 Memory Data Pre-Fetch Read Command without Address Increment Register (F0H) ........................ 36
6.60 Memory Data Read Command with Address Increment Register (F2H)................................................ 36
Preliminary datasheet
DM9013-15-DS-P03
April 9, 2009
5
5 Page 
DM9013
3-port switch with Processor Interface
3. Features
Ethernet Switch with two 10/100Mb PHY, one MII/RMII, and general processor bus
interface
Support Reverse-MII
Processor bus slave architecture
EEPROM interface for power up configurations
Support TCP/UDP/IPv4 checksum offload
Support HP Auto-MDIX
Support IEEE 802.3x Flow Control in Full-duplex mode
Support Back Pressure Flow Control in Half-duplex mode
Per port support 4 priority queues by Port-based, 802.1P VLAN, and IP TOS priority
Support 802.1Q VLAN up-to 16 VLAN group
Support VLAN ID tag/untag options
Per port support bandwidth, ingress and egress rate control
Support Broadcast Storming filter function
Support Store and Forward switching approach
Support up-to 1K Uni-cast MAC addresses
Automatic aging scheme
Support MIB counters for diagnostic
uP data bus driving capability adjustable
Port 2 TXD/TXE driving capability adjustable
Auto. control to prevent memory read count error
128-pin LQFP 1.8V internal core, 3.3V I/O with 5V tolerant
Preliminary datasheet
DM9013-15-DS-P03
April 9, 2009
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DM9013.PDF ] | |
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