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PDF IDT8T49N006I Data sheet ( Hoja de datos )
| Número de pieza | IDT8T49N006I | |
| Descripción | LVPECL/LVDS Clock Generator | |
| Fabricantes | Integrated Device Technology | |
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Programmable FemtoClock® NG LVPECL/LVDS
Clock Generator with 6-Outputs
IDT8T49N006I
DATASHEET
General Description
The IDT8T49N006I is a six output Clock Generator with selectable
LVDS or LVPECL outputs. The IDT8T49N006I can generate any one
of four frequencies from a single crystal or reference clock. The four
frequencies are selected from the Frequency Selection Table (Table
3A) and are programmed via I2C interface. The four predefined
frequencies are selected in the user application by two frequency
selection pins. Note the desired programmed frequencies must be
used with the corresponding crystal or clock frequency as indicated
in Table 3A.
Excellent phase noise performance is maintained with IDT’s Fourth
Generation FemtoClock® NG PLL technology, which delivers
sub-400fs RMS phase jitter.
Features
• Fourth Generation FemtoClock NG PLL technology
• Six selectable LVPECL or LVDS outputs via I2C
• CLK, nCLK input pair can accept the following differential input
levels: LVPECL, LVDS, HCSL
• FemtoClock NG VCO Range: 1.91GHz - 2.5GHz
• RMS phase jitter at 156.25MHz (12kHz - 20MHz): 228fs (typical)
• RMS phase jitter at 156.25MHz (10kHz - 1MHz): 175fs (typical)
• Full 2.5V or 3.3V power supply
• I2C programming interface
• PCI Express (2.5 Gb/S), Gen 2 (5 Gb/s) and Gen 3 (8 Gb/s) jitter
compliant
• -40°C to 85°C ambient operating temperature
• Lead-free (RoHS 6) packaging
Pin Assignment
V EE
SCLK
SDATA
V EE
VCCA
LOCK
V EE
V CC
CLK_SEL
V EE
30 29 28 27 26 25 24 23 22 21
31 20
32 19
33 18
34 17
35 16
36 15
37 14
38 13
39 12
40 11
1 2 3 4 5 6 7 8 9 10
FSEL1
VCC
VEE
ADDR_SEL
FSEL0
nCLK
CLK
VEE
XTAL_OUT
XTAL_IN
IDT8T49N006I
40-Lead VFQFN
6mm x 6mm x 0.95mm package body
4.65mm x 4.65mm E-Pad
NL Package
Top View
IDT8T49N006A-dddNLGI REVISION A OCTOBER 22, 2013
1
©2014 Integrated Device Technology, Inc.
1 page  
IDT8T49N006I Data Sheet
PROGRAMMABLE FEMTOCLOCK® NG LVPECL/LVDS CLOCK GENERATOR WITH 6-OUTPUTS
Table 3B. I2C Register Map
Register
0
Binary
Register
Address
00000
D7
M0[8]
D6
M0[7]
D5
M0[6]
Register Bit
D4
M0[5]
D3
M0[4]
D2
M0[3]
D1
M0[2]
D0
M0[1]
1 00001
M1[8]
M1[7]
M1[6]
M1[5]
M1[4]
M1[3]
M1[2]
M1[1]
2 00010
3 00011
M2[8]
M3[8]
M2[7]
M3[7]
M2[6]
M3[6]
M2[5]
M3[5]
M2[4]
M3[4]
M2[3]
M3[3]
M2[2]
M3[2]
M2[1]
M3[1]
4
00100
unused
5 00101 unused
N0[6]
N1[6]
N0[5]
N1[5]
N0[4]
N1[4]
N0[3]
N1[3]
N0[2]
N1[2]
N0[1]
N1[1]
N0[0]
N1[0]
6 00110 unused
N2[6]
N2[5]
N2[4]
N2[3]
N2[2]
N2[1]
N2[0]
7 00111 unused
8 01000 unused
N3[6]
BYPASS0
N3[5]
PS0[1]
N3[4]
PS0[0]
N3[3]
P0[1]
N3[2]
P0[0]
N3[1]
CP0[1]
N3[0]
CP0[0]
9 01001 unused
10 01010 unused
BYPASS1
BYPASS2
PS1[1]
PS2[1]
PS1[0]
PS2[0]
P1[1]
P2[1]
P1[0]
P2[0]
CP1[1]
CP2[1]
CP1[0]
CP2[0]
11 01011 unused
BYPASS3
PS3[1]
PS3[0]
P3[1]
P3[0]
CP3[1]
CP3[0]
12 01100 LVDS_SEL0[Q5] LVDS_SEL0[Q4] LVDS_SEL0[Q3] reserved LVDS_SEL0[Q2] LVDS_SEL0[Q1] LVDS_SEL0[Q0] reserved
13 01101 LVDS_SEL1[Q5] LVDS_SEL1[Q4] LVDS_SEL1[Q3] reserved LVDS_SEL1[Q2] LVDS_SEL1[Q1] LVDS_SEL1[Q0] reserved
14 01110 LVDS_SEL2[Q5] LVDS_SEL2[Q4] LVDS_SEL2[Q3] reserved LVDS_SEL2[Q2] LVDS_SEL2[Q1] LVDS_SEL2[Q0] reserved
15 01111 LVDS_SEL3[Q5] LVDS_SEL3[Q4] LVDS_SEL3[Q3] reserved LVDS_SEL3[Q2] LVDS_SEL3[Q1] LVDS_SEL3[Q0] reserved
16
10000
OE0[Q5]
OE0[Q4]
OE0[Q3]
reserved
OE0[Q2]
OE0[Q1]
OE0[Q0]
reserved
17
10001
OE1[Q5]
18
10010
OE2[Q5]
OE1[Q4]
OE2[Q4]
OE1[Q3]
OE2[Q3]
reserved
reserved
OE1[Q2]
OE2[Q2]
OE1[Q1]
OE2[Q1]
OE1[Q0]
OE2[Q0]
reserved
reserved
19
10011
OE3[Q5]
20
10100
reserved
21 10101 unused
22 10110 unused
23 10111 unused
OE3[Q4]
reserved
unused
unused
unused
OE3[Q3]
reserved
unused
unused
unused
reserved
reserved
unused
unused
unused
OE3[Q2]
reserved
unused
unused
unused
OE3[Q1]
reserved
unused
unused
unused
OE3[Q0]
unused
unused
unused
unused
reserved
unused
unused
unused
unused
IDT8T49N006A-dddNLGI REVISION A OCTOBER 22, 2013
5
©2014 Integrated Device Technology, Inc.
5 Page 
IDT8T49N006I Data Sheet
PROGRAMMABLE FEMTOCLOCK® NG LVPECL/LVDS CLOCK GENERATOR WITH 6-OUTPUTS
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC
Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Item
Supply Voltage, VCC
Inputs, VI
XTAL_IN
Other Input
Outputs, IO (LVPECL)
Continuous Current
Surge Current
Rating
3.63V
0V to 2V
-0.5V to VCC + 0.5V
50mA
100mA
Outputs, IO (SDATA)
Outputs, IO (LVDS)
Continuous Current
Surge Current
Package Thermal Impedance, JA
Storage Temperature, TSTG
10mA
10mA
15mA
32.4C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, VCC = VCCO = 3.3V ± 5%, VEE = 0V, TA = -40°C to 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
VCC
VCCA
VCCO
ICCA
IEE
ICC
ICCO
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Analog Supply Current
Power Supply Current
Power Supply Current
Output Supply Current
LVPECL
LVDS
LVDS
3.135
VCC – 0.32
3.135
3.3
3.3
3.3
3.465
VCC
3.465
32
208
125
124
Units
V
V
V
mA
mA
mA
mA
Table 4B. Power Supply DC Characteristics, VCC = VCCO = 2.5V ± 5%, VEE = 0V, TA = -40°C to 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
VCC
VCCA
VCCO
ICCA
IEE
ICC
ICCO
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Analog Supply Current
Power Supply Current
Power Supply Current
Output Supply Current
LVPECL
LVDS
LVDS
2.375
VCC – 0.28
2.375
2.5
2.5
2.5
2.625
VCC
2.625
28
200
122
121
Units
V
V
V
mA
mA
mA
mA
IDT8T49N006A-dddNLGI REVISION A OCTOBER 22, 2013
11
©2014 Integrated Device Technology, Inc.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet IDT8T49N006I.PDF ] | |
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