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PDF CLC1200 Data sheet ( Hoja de datos )
| Número de pieza | CLC1200 | |
| Descripción | Instrumentation Amplifier | |
| Fabricantes | Exar | |
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CLC1200
Instrumentation Amplifier
General Description
The CLC1200 is a low power, general purpose instrumentation amplifier
with a gain range of 1 to 10,000. The CLC1200 is offered in 8-lead SOIC
or DIP packages and requires only one external gain setting resistor
making it smaller and easier to implement than discrete, 3-amp designs.
While consuming only 2.2mA of supply current, the CLC1200 offers a low
6.6nV/Hz input voltage noise and 0.2μVpp noise from 0.1Hz to 10Hz.
The CLC1200 offers a low input offset voltage of ±125μV that only varies
0.1μV/°C over it’s operating temperature range of -40°C to +85°C. The
CLC1200 also features 50ppm maximum nonlinearity. These features
make it well suited for use in data acquisition systems.
F E AT U R E S
■■ ±2.3V to ±18V supply voltage range
■■ Gain range of 1 to 10,000
■■ Gain set with one external resistor
■■ ±125μV maximum input offset voltage
■■ 0.1μV/°C input offset drift
■■ 700kHz bandwidth at G = 1
■■ 1.2V/μs slew rate
■■ 90dB minimum CMRR at G = 10
■■ 2.2mA maximum supply current
■■ 6.6nV/√Hz input voltage noise
■■ 70nV/√Hz output voltage noise
■■ 0.2μVpp input noise (0.1Hz to 10Hz)
■■ DIP-8 or Pb-free SOIC-8
A P P L I C AT I O N S
■■ Bridge amplifier
■■ Weigh scales
■■ Thermocouple amplifier
■■ ECG and medical instrumentation
■■ MRI (Magnetic Resonance Imaging)
■■ Patient monitors
■■ Transducer interface
■■ Data acquisition systems
■■ Strain gauge amplifier
■■ Industrial process controls
Ordering Information - back page
Typical Application
–Input
2
1
+VS
7
RG CLC1200 6
8
+Input 3
5
4
Reference
–VS
VOUT
Load
To Power
Supply Ground
Thermocouple Amplifier
Competitive Plot
3
2
Competitor A
1
0
-1
CLC1200
-2
-3
-4 G = 1
VS = ±15V
-5 VOUT = 0.2Vpp
-6 RL = 2kΩ
-7
0.0001
0.001
0.01
0.1
Frequency (MHz)
© 2008-2014 Exar Corporation
1 / 15
1 10
exar.com/CLC1200
Rev 2E
1 page  
CLC1200 Pin Configurations
SOIC-8, DIP-8
RG
-IN1
1
2
+IN1 3
-Vs 4
-
+
8 RG
7 +Vs
6 OUT
5 REF
CLC1200
CLC1200 Pin Assignments
SOIC-8, DIP-8
Pin No.
1, 8
2
3
4
5
6
7
Pin Name
RG
-IN
+IN
-VS
REF
OUT
+VS
Description
RG sets gain
Negative input
Positive input
Negative supply
Output is referred to the REF pin potential
Output
Positive supply
© 2008-2014 Exar Corporation
5 / 15
exar.com/CLC1200
Rev 2E
5 Page 
CLC1200
Application Information
Basic Information
The CLC1200 is a monolithic instrumentation amplifier
based on the classic three op amp solution, refer to the
Functional Block Diagram shown in Figure 1. The CLC1200
produces a single-ended output referred to the REF pin
potential.
-IN
RG
+IN
+
–
–
+
–
OUT
+
REF
Figure 1: Functional Block Diagram
1% RG (Ω)
49.9k
12.4k
5.49k
2.61k
1.00k
499
249
100
49.9
Caclulated
Gain
1.990
4.984
9.998
19.93
50.40
100.0
199.4
495.0
991.0
0.1% RG (Ω)
49.3k
12.4k
5.49k
2.61k
1.01k
499
249
98.8
49.3
Calculated
Gain
2.002
4.984
9.998
19.93
49.91
100.0
199.4
501.0
1,003.0
Table 1: Recommended RG Values
Follow these guidelines for improved performance:
■■ To maintain gain accuracy, use 0.1% to 1% resistors
■■ To minimize gain error, avoid high parasitic resistance in
series with RG
■■ To minimize gain drift, use low TC resistors (<10ppm/°C)
The internal resistors are trimmed which allows the gain to be
accurately adjusted with one external resistor RG.
G=
49.4k
RG
+ 1;
RG
=
49.4k
G-1
RG also determines the transconductance of the preamp
stage.As RG is reduced for larger gains, the transconductance
increases to that of the input transistors. Producing the
following advantages:
■■ Open-loop gain increases as the gain is increased, reducing
gain related errors
■■ Gain-bandwidth increases as the gain is increased,
optimizing frequency response
■■ Reduced input voltage noise which is determined by the
collector current and base resistance of the input devices
Gain Selection
The impedance between pins 1 and 8, RG, sets the gain
of the CLC1200. Table 1 shows the required standard table
values of RG for various calculated gains. For G = 1, RG = ∞.
Common Mode Rejection
The CLC1200 offers high CMRR. To achieve optimal CMRR
performance:
■■ Connect the reference terminal (pin 5) to a low impedance
source
■■ Minimize capacitive and resistive differences between the
inputs
In many applications, shielded cables are used to minimize
noise. Properly drive the shield for best CMRR performance
over frequency. Figures 1 and 2 show active data guards
that are configured to improve AC common-mode rejections.
the capacitances of input cable shields are “bootstrapped”
to minimize the capacitance mismatch between the inputs.
+ Input
+V S
_
_ RG / 2
100
CLCxxx
+
RG / 2
CLC1200
+
REF
- Input
-V S
Figure 2: Common-mode Shield Driver
Output
© 2008-2014 Exar Corporation
11 / 15
exar.com/CLC1200
Rev 2E
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet CLC1200.PDF ] | |
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