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PDF BD8325FVT-M Data sheet ( Hoja de datos )
| Número de pieza | BD8325FVT-M | |
| Descripción | Built-in Secondary-side Driver | |
| Fabricantes | ROHM Semiconductor | |
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Isolated DC/DC controller IC
Built-in Secondary-side Driver
with Synchronous Rectification
Active Clamp PWM Controller
BD8325FVT-M
●General Description
BD8325FVT-M is a PWM controller intended for Active
clamp, current-mode isolated switching regulator.
This controller provides control outputs for driving
primary-side MOSFET, and outputs with adjustable delay,
which can be used for driving synchronous rectifier
MOSFET on the secondary-side.
Its maximum input voltage is 20V. External startup
regulator can be set at high voltage.
●Applications
■ High efficiency/ large current isolated DC/DC
(VINmax=100V)
■ Cellular base station
■ Industrial power supplies
■ Car application
■ 10W to 700W SMPS
●Package
TSSOP-B30
W(Typ) x D(Typ) x H(Max)
10.00mm x 7.60mm x 1.00mm
●Typical Application Circuits
VLINE
●Features
■ Ideal for Active Clamp /Rest Forward/Flyback
converter
■ Current-mode Control with Dual Mode Over-Current
Protection
■ Synchronization to External Clock
■ Programmable Dead-Time (Turn-On/Turn-Off)
between MAIN and AUX MOSFET by External
Resistor
■ Have Control Outputs for Driving Primary Side
MOSFET; Have Outputs with Adjustable Time for
Driving Synchronous Rectifier MOSFET in
Secondary Side (OUT2F, OUT2R pin)
■ Programmable Oscillator Frequency and Maximum
Duty Cycle by External Resistor
■ Programmable Soft-Start Time by External
Capacitor
■ Programmable Slope Compensation by External
Resistor
■ A Variety of Protection
First Over-Current Protection (Pulse-by-Pulse mode)
Second Over-Current Protection (HICCUP mode)
VCC_UVLO (Input Under-Voltage Protection)
LINE_UVLO (Line Under-Voltage Protection)
VOUT
Wake
up
REG
CS VCC/VDD
LINEUV
VREF
AUX
SS
FB
SAWH
RTON
OUT
RTOFF
RDELON
RDELOFF OUT2F
RDELSLF
RDELSLR1
RDELSLR2 OUT2R
CLKOUT
SYNC
GND
PGND
REG
ERROR
AMP
Fig.1 Typical Application Circuit
○Structure：Silicon Monolithic Integrated Circuit ○This product has no designed protection against radioactive rays.
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
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TSZ02201-0Q3Q0AJ83250-1-2
2013.11.22 Rev.002
1 page  
BD8325FVT
⑨PWM signal generator
Through the comparator, CS1 related signal is compared with the lower voltage of SS/SD（⑦）and FB pin, and RESET
signal for Latch circuit (⑫) is produced. To be precise, the CS1 level +0.5V and the lower of SS/SD and FB level’s 1/5
are compared and the output pulse is entered into Latch circuit. In addition, when FB is lowered and SS/SD drops to
2.3V (typ), Duty0 signal turns H and RESET signal continues outputting, switching is terminated and Duty is turned to 0%.
Once the switching restarts, Duty0 will not turn H unless the voltage drops to the hysteresis voltage, 2.225V (typ).
⑩RESET condition generator
According to the outputs from each protection circuit, the block controls the signal as shown below:
(1) SS/SD 15uA charge, 15uA discharge, instantaneous discharge
(2) PWM signal（OUT, AUX, OUT2F, OUT2R）OFF
⑪SS charge/discharge controller
According to whether the protection operation is detected, the operation is shown as (1) ～ (3)
(1) 15uA Charge (SOFT_START) condition: when VCC UVLO, VREF UVLO, LINE UVLO, TSD, CS2, SAWH LVP
and external R-OPEN protections are not detected. SS/SD is clamped to VREF5V level.
(2) 15uA Discharge (SOFT_STOP) condition: when LINE, TSD and CS2 protections are detected.
Once detected, the signal is latched. The IC will not restore to SOFT START mode unless SS/SD is 0.5V.
(3) Instantaneous Discharge (discharge resistor R=0.5kΩ) condition: when VCC UVLO, VREF UVLO, SAWH LVP
and R-OPEN protection are detected.
⑫PWM signal latch block
The reference pulse signal of each output pulse is generated by SR-Flipflop.
SET: internal clock signal
RESET: PWM output signal or OCP1 signal or CLKOUT signal (Max Duty)
⑬Turn-on delay/Turn-off delay time generator
According to the dead-times, which are set by the external resistor on OUT, AUX, OUT2F and OUT2R pin in block ④,
dead-times are applied to PWM signal (⑫).
⑭PREDRIVER
The level of VREF5V is shifted to VDD level.
⑮POWMOS
This is the driver’s output stage for driving external MOSFET. It is constituted by NMOS and PMOS and the power supply
is VDD (absolute maximum rating is 20V).
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
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TSZ02201-0Q3Q0AJ83250-1-2
5 Page 
BD8325FVT
10.00
1.00
0.10
10
100
RTOFF [kΩ]
Fig.12 TRTOFF - RTOFF
1.6
1.5
1.4
1.3
1.2
1.1
1000
1
-50
RTON= 120kΩ
RTOFF= 120kΩ
0 50 100
Temp [°C]
Fig.13 TRTOFF - RTOFF
150
1.4
1.35
1.3
1.25
1.2
1.15
1.1
1.05
1
-50
6
5.8
5.6
5.4
5.2
5
4.8
4.6
4.4
4.2
4
0 50 100 150 -50
Temp [°C]
V_LINEUV= 1.3V
0 50 100
Temp [°C]
150
Fig.14 LINEUV Threshold - Temp
Fig.15 I_LINEUV – VLINEUV
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/30
TSZ02201-0Q3Q0AJ83250-1-2
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet BD8325FVT-M.PDF ] | |
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