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GM72V66841CT fiches techniques PDF

LG Semicon - 2M x 8-Bit x 4 Bank SDRAM

Numéro de référence GM72V66841CT
Description 2M x 8-Bit x 4 Bank SDRAM
Fabricant LG Semicon 
Logo LG Semicon 





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GM72V66841CT fiche technique
LG Semicon Co.,Ltd.
Description
The GM72V66841CT/CLT is a synchronous
dynamic random access memory comprised of
67,108,864 memory cells and logic including
input and output circuits operating synchronously
by referring to the positive edge of the externally
provided Clock.
The GM72V66841CT/CLT provides four
banks of 2,097,152 word by 8 bit to realize high
bandwidth with the Clock frequency up to 125
Mhz.
Features
* PC100,PC66 Compatible
7K(2-2-2), 7J(3-2-2), 10K(PC66)
* 3.3V single Power supply
* LVTTL interface
* Max Clock frequency
100/125 MHz
* 4,096 refresh cycle per 64 ms
* Two kinds of refresh operation
Auto refresh/ Self refresh
* Programmable burst access capability ;
- Sequence:Sequential / Interleave
- Length :1/2/4/8/FP
* Programmable CAS latency : 2/3
* 4 Banks can operate independently or
simultaneously
* Burst read/burst write or burst read/single
write operation capability
* Input and output masking by DQM input
* One Clock of back to back read or write
command interval
* Synchronous Power down and Clock
suspend capability with one Clock latency
for both entry and exit
*JEDEC Standard 54Pin 400mil TSOP II
Package
GM72V66841CT/CLT
2,097,152 WORD x 8 BIT x 4 BANK
SYNCHRONOUS DYNAMIC RAM
Pin Configuration
VCC
DQ0
VCCQ
NC
DQ1
VSSQ
NC
DQ2
VCCQ
NC
DQ3
VSSQ
NC
VCC
NC
/WE
/CAS
/RAS
/CS
BA0/A13
BA1/A12
A10,AP
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
JEDEC STANDARD
400 mil 54 PIN TSOP II
(TOP VIEW)
54 VSS
53 DQ7
52 VSSQ
51 NC
50 DQ6
49 VCCQ
48 NC
47 DQ5
46 VSSQ
45 NC
44 DQ4
43 VCCQ
42 NC
41 VSS
40 NC
39 DQM
38 CLK
37 CKE
36 NC
35 A11
34 A9
33 A8
32 A7
31 A6
30 A5
29 A4
28 VSS
Pin Name
CLK
CKE
CS
RAS
CAS
WE
A0~A9,A11
A10 / AP
BA0/A13
~BA1/A12
DQ0~DQ7
DQM
VCCQ
VSSQ
VCC
VSS
NC
Clock
Clock Enable
Chip Select
Row Address Strobe
Column Address Strobe
Write Enable
Address input
Address input or Auto Precharge
Bank select
Data input / Data output
Data input / output Mask
VCC for DQ
VSS for DQ
Power for internal circuit
Ground for internal circuit
No Connection
1

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