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PDF PCF7341ATJ Data sheet ( Hoja de datos )
| Número de pieza | PCF7341ATJ | |
| Descripción | Security Transponder and RISC Controller | |
| Fabricantes | NXP Semiconductors | |
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PCF7941ATJ
PCF7341ATJ
Security Transponder and RISC Controller
(STARC 2XLite)
Product Specification
CONFIDENTIAL
2013 Oct 15
1 page  
NXP Semiconductors
Security Transponder and RISC Controller (STARC 2XLite)
Product Specification
PCF7x41ATJ
5 BLOCK DIAGRAM
The PCF7x41ATJ features a high degree of integration and
incorporates the chip, coil and capacitors assembled in a
leaded stick package, see Figure 2.
Package
L/C Resonance Circuit
Rectified LF Filed supply blocking capacitor
Contactless Interface
Rectifier and Voltage Limiter
Modulator
Clock Recovery
Demodulator
LF Field Detection
Calculation Unit
HT2 (48 bit) and HT3 (96 bit) Algorithm
Power Management
Supply Switch Logic
Wake Up Sense (Button I/O)
Watchdog Timer
Reset Logic
RISC Controller and Peripherals
8 Bit RISC (MRK )
ROM (Firmware)
E-ROM (Application program)
RAM
EEPROM
Interrupt Control
Timers / Counters
I/O Ports
Programmable Voltage Comparator
System Clock (including on-chip RC oscillator)
Figure 2. Block Diagram
Resonance
circuit
PCF7941ATJ (PCF7341ATJ)
IN1 V7941 (V7341)
L
IN2
fRES = 125 kHz (typ)
VFLD
4 K Calculation
EROM (ROM)
Unit
4 K Interrupt
ROM
Control
128 Byte
RAM
Timer
Modulator
I/O
CVFLD
512 Byte
EEPROM
RC
Oscillator
Power Management
VSS
2013 Oct 15
5 CONFIDENTIAL
5 Page 
NXP Semiconductors
Security Transponder and RISC Controller (STARC 2XLite)
Product Specification
PCF7x41ATJ
10 LIMITING VALUES
All values are in accordance with Absolute Maximum Rating System (IEC 134)
PARAMETER
MIN MAX
Operating temperature range
-40 +85
Storage temperature range
-55 +125
Reflow soldering peak temperature, Note 2
232,5
Package Mositure Sensitivity Level (MSL)
3
Magnetic flux density (resistance against magnetic pulses)
0.2
Latch-up current, Note 3
100
ESD, human body model, Note 4
2
ESD, human body model for pins VBAT and VSS, Note 4
4
ESD, machine model, Note 5
250
ESD CDM, Field Induced Model for corner pins, Note 6
750
ESD CDM, Field Induced Model for all pins besides corner pins, Note 6
650
Vibration
- 10 - 2000Hz
- 3.axis
- IEC 68-2-6, Test Fc
10
Shock
- 3.axis
- IEC 68-2-27, Test Ea
1500
Mechanical stress (FMAX), Note 1
10
Note
1. FMAX is specified as indicated in Test Setup, section 12.
2. Reflow stress levels in accordance with JEDEC 22 A113D, excluding limitation of peak temperature.
3. According to JEDEC, JESD 17.
4. According to JEDEC, JESD 22-A114.
5. According to JEDEC, JESD 22-A115.
6. According to JEDEC, JESD 22-C101.
UNIT
°C
°C
°C
T
mA
kV
kV
V
V
V
g
g
N
2013 Oct 15
11
Confidential
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet PCF7341ATJ.PDF ] | |
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