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PDF ADT7463 Data sheet ( Hoja de datos )
| Número de pieza | ADT7463 | |
| Descripción | Remote Thermal Controller and Voltage Monitor | |
| Fabricantes | ON Semiconductor | |
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ADT7463
Remote Thermal Controller
and Voltage Monitor
The ADT7463 controller is a complete systems monitor and
multiple PWM fan controller for noise−sensitive applications
requiring active system cooling. It can monitor 12 V, 5 V, and 2.5 V
CPU supply voltages, plus its own supply voltage. It can monitor the
temperature of up to two remote sensor diodes, plus its own internal
temperature. It can measure and control the speed of up to four fans so
that they operate at the lowest possible speed for minimum acoustic
noise. The automatic fan speed control loop optimizes fan speed for a
given temperature. A unique dynamic TMIN control mode enables the
system thermals/acoustics to be intelligently managed. The
effectiveness of the system’s thermal solution can be monitored using
the THERM input. The ADT7463 also provides critical thermal
protection to the system using the bidirectional THERM pin as an
output to prevent system or component overheating.
Features
• Monitors Up to 5 Supply Voltages
• Controls and Monitors up to 4 Fan Speeds
• 1 On−Chip and 2 Remote Temperature Sensors
• Monitors Up to 6 Processor VID Bits
• Dynamic TMIN Control Mode Optimizes System Acoustics
Intelligently
• Automatic Fan Speed Control Mode Controls System Cooling Based
on Measured Temperature
• Enhanced Acoustic Mode Dramatically Reduces User Perception of
Changing Fan Speeds
• Thermal Protection Feature via THERM Output
• Monitors Performance Impact of Intel® Pentium® 4 Processor
Thermal Control Circuit via THERM Input
• 2−wire and 3−wire Fan Speed Measurement
• Limit Comparison of All Monitored Values
• Meets SMBus 2.0 Electrical Specifications
(Fully SMBus 1.1 Compliant)
• This is a Pb−Free Device
Applications
• Low Acoustic Noise PCs
• Networking and Telecommunications Equipment
http://onsemi.com
QSOP24 NB
CASE 492B
PIN ASSIGNMENT
SDA 1
24 PWM1/XTO
SCL 2
GND 3
VCC 4
VID0 5
VID1 6
VID2 7
ADT7463
23 VCCP
22
+2.5VIN/
SMBALERT
21 +12VIN/VID5
20 +5VIN/THERM
19 VID4
18 D1+
VID3 8
17 D1−
TACH3
PWM2/
SMBALERT
TACH1
9
10
11
TACH2 12
16 D2+
15 D2−
14
TACH4/ADDR
SELECT/THERM
13 PWM3/ADDRESS
ENABLE
(Top View)
MARKING DIAGRAM
ADT7463A
RQZ#YYWW
ADT7463ARQZ = Specific Device Code
# = Pb−Free Package
YY = Date Code
WW = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 49 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 7
1
Publication Order Number:
ADT7463/D
1 page  
ADT7463
Table 4. ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted.) (Notes 1, 2, 3, 4)
Parameter
Test Conditions/Comments
Min
Typ Max Unit
ANALOG−TO−DIGITAL CONVERTER (INCLUDING MUX AND ATTENUATORS)
Input Resistance
FAN RPM−TO−DIGITAL CONVERTER
100 140 200 kW
Accuracy
Full−scale Count
0°C ≤ TA ≤ 70°C
0°C ≤ TA ≤ 105°C
−40°C ≤ TA ≤ +120°C
Nominal Input RPM
Fan Count = 0xBFFF
Fan Count = 0x3FFF
Fan Count = 0x0438
Fan Count = 0x021C
Internal Clock Frequency
OPEN−DRAIN DIGITAL OUTPUTS, PWM1 TO PWM3, XTO
− − ±7 %
− − ±11
− − ±13
− − 65,535
− 109 − RPM
− 329 −
− 5,000 −
− 10,000 −
82.8 90.0 97.2 kHz
Current Sink, IOL
Output Low Voltage, VOL
IOUT = −8.0 mA, VCC = 3.3 V
High Level Output Current, IOH
VOUT = VCC
OPEN−DRAIN SERIAL DATA BUS OUTPUT (SDA)
− − 8.0 mA
− − 0.4 V
− 0.1 1.0 mA
Output Low Voltage, VOL
High Level Output Current, IOH
SMBUS DIGITAL INPUTS (SCL, SDA)
IOUT = −4.0 mA, VCC = 3.3 V
VOUT = VCC
− − 0.4 V
− 0.1 1.0 mA
Input High Voltage, VIH
Input Low Voltage, VIL
Hysteresis
DIGITAL INPUT LOGIC LEVELS (VID0 TO VID5)
2.0 −
−V
− − 0.4 V
− 500 − mV
Input High Voltage, VIH
Bit 6 (THLD) Reg. 0x43 = 0
(VID Threshold = 1 V)
1.7 −
−V
Input Low Voltage, VIL
Bit 6 (THLD) Reg. 0x43 = 0
(VID Threshold = 1 V)
− − 0.8 V
Input High Voltage, VIH
Bit 6 (THLD) Reg. 0x43 = 1
(VID Threshold = 0.6 V)
0.8 −
−V
Input Low Voltage, VIL
Bit 6 (THLD) Reg. 0x43 = 1
(VID Threshold = 0.6 V)
− − 0.4 V
DIGITAL INPUT LOGIC LEVELS (TACH INPUTS)
Input High Voltage, VIH
Maximum Input Voltage
2.0 −
−V
− − 5.5
Input Low Voltage, VIL
Minimum Input Voltage
−
−
+0.8
V
−0.3 −
−
Hysteresis
DIGITAL INPUT LOGIC LEVELS (THERM) AGTL+
− 0.5 − V p−p
Input High Voltage, VIH
Input Low Voltage, VIL
DIGITAL INPUT CURRENT
− 0.75 × VCCP −
− − 0.4
V
V
Input High Current, IIH
Input Low Current, IIL
Input Capacitance, CIN
VIN = VCC
VIN = 0
−1.0 −
− mA
−
−
+1.0
mA
− 5.0 − pF
http://onsemi.com
5
5 Page 
ADT7463
Serial Bus Interface
Control of the ADT7463 is carried out using the serial
system management bus (SMBus). The ADT7463 is
connected to this bus as a slave device, under the control of
a master controller.
The ADT7463 has a 7−bit serial bus address. When the
device is powered up with Pin 13 (PWM3/
ADDRESS ENABLE) high, the ADT7463 has a default
SMBus address of 0101110 or 0x2E. The read/write bit must
be added to get the 8−bit address. If more than one ADT7463
is used in a system, then each ADT7463 should be placed in
address select mode by strapping Pin 13 low on power−up.
The logic state of Pin 14 then determines the device’s
SMBus address. The logic of these pins is sampled upon
power−up.
The device address is sampled and latched on the first
valid SMBus transaction, more precisely on the
low−to−high transition at the beginning of the 8th SCL
pulse, when the serial bus address byte matches the selected
slave address. The selected slave address is chosen using the
address enable/address select pins. Any attempted changes
in the address will have no effect after this.
Table 5. ADDRESS SELECT MODE
Pin 13
State
Pin 14 State
Address
0 Low (10 kW to GND) 0101100 (0x2C)
0 High (10 kW Pull−up) 0101101 (0x2D)
1 Don’t Care
0101110 (0x2E) (Default)
ADT7463
VCC
ADDR_SEL 14
10 kW
PWM3/ 13
ADDR_EN
ADDRESS = 0x2E
Figure 13. Default SMBus Address = 0x2E
ADT7463
ADDR_SEL
PWM3/
ADDR_EN
14 10 kW
13
ADDRESS = 0x2C
Figure 14. SMBus Address = 0x2C (Pin 14 = 0)
VCC
ADT7463
ADDR_SEL 14
10 kW
PWM3/ 13
ADDR_EN
ADDRESS = 0x2D
Figure 15. SMBus Address = 0x2D (Pin 14 = 1)
VCC
ADT7463
ADDR_SEL 14
10 kW
PWM3/
ADDR_EN
13
NC
DO NOT LEAVE ADDR_EN
UNCONNECTED! CAN
CAUSE UNPREDICTABLE
ADDRESSES.
CARE SHOULD BE TAKEN TO ENSURE THAT PIN 13
(PWM3/ADDR_EN) IS EITHER TIED HIGH OR LOW. LEAVING
PIN 13 FLOATING COULD CAUSE THE ADT7463 TO POWERUP
WITH AN UNEXPECTED ADDRESS.
NOTE THAT IF THE ADT7463 IS PLACED INTO ADDRESS
SELECT MODE, PINS 13 AND 14 CAN BE USED AS THE
ALTERNATE FUNCTIONS (PWM3, TACH4/THERM) ONLY IF THE
CORRECT CIRCUIT IS MUXED IN AT THE CORRECT TIME.
Figure 16. Unpredictable SMBus Address if Pin 13
is Unconnected
The ability to make hardwired changes to the SMBus
slave address allows the user to avoid conflicts with other
devices sharing the same serial bus, for example, if more
than one ADT7463 is used in a system.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a
START condition, defined as a high−to−low
transition on the serial data line SDA while the
serial clock line SCL remains high. This indicates
that an address/data stream will follow. All slave
peripherals connected to the serial bus respond to
the START condition and shift in the next eight
bits, consisting of a 7−bit address (MSB first) plus
a R/W bit, which determines the direction of the
data transfer, i.e., whether data will be written to
or read from the slave device.
The peripheral whose address corresponds to the
transmitted address responds by pulling the data
line low during the low period before the ninth
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADT7463.PDF ] | |
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