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PDF DP7411 Data sheet ( Hoja de datos )
| Número de pieza | DP7411 | |
| Descripción | Dual Digital Potentiometers | |
| Fabricantes | COPAL ELECTRONICS | |
| Logotipo |  |
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DP7411
Dual Digital Potentiometers (DP)
with 64 Taps and SPI Interface
FEATURES
Two linear-taper digital potentiometers
64 resistor taps per potentiometer
End to end resistance 2.5k, 10k, 50k or
100k
Potentiometer control and memory access via
SPI interface: Mode (0, 0) and (1, 1)
Low wiper resistance, typically 80
Nonvolatile memory storage for up to four
wiper settings for each potentiometer
Automatic recall of saved wiper settings at
power up
2.5 to 6.0 volt operation
Standby current less than 1µA
24-lead SOIC and 24-lead TSSOP
Industrial temperature ranges
DESCRIPTION
The DP7411 is two Digital Potentiometers
(DPs) integrated with control logic and 16 bytes
of NVRAM memory. Each DP consists of
a series of 63 resistive elements connected
between two externally accessible end points. The tap
points between each resistive element are connected
to the wiper outputs with CMOS switches. A separate
6-bit control register (WCR) independently controls
the wiper tap switches for each DP. Associated with
each wiper control register are four 6-bit non-volatile
memory data registers (DR) used for storing up to four
wiper settings. Writing to the wiper control register or
any of the non-volatile data registers is via a SPI serial
bus. On power-up, the contents of the first data
register (DR0) for each of the two potentiometers is
automatically loaded into its respective wiper control
register.
The DP7411 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications.
PIN CONFIGURATION
SOIC (W)
(top view)
VCC 1
24 NC
RL0 2
23 NC
RH0 3
22 NC
RW0 4
21 NC
¯C¯S¯ 5
20 A0
¯W¯P¯ 6 DP 19 SO
SI 7 7411 18 H¯¯O¯L¯D¯
A1 8
17 SCK
RL1 9
16 NC
RH1 10
15 NC
RW1 11
14 NC
GND 12
13 NC
TSSOP (Y)
(top view)
SI 1
24 ¯W¯P¯
A1 2
23 ¯C¯S¯
RL1
RH1
RW1
3
4
5
22 RW0
21 RH0
20 RL0
GND 6 DP 19 VCC
NC 7 7411 18 NC
NC 8
17 NC
NC 9
16 NC
NC 10
15 NC
SCK 11
14 A0
H¯¯O¯L¯D¯ 12
13 SO
FUNCTIONAL DIAGRAM
RH0 RH1
CS
SCK
SI
SO
WP
A0
A1
SPI BUS
INTERFACE
WIPER
CONTROL
REGISTERS
RW0
CONTROL
LOGIC
NONVOLATILE
DATA
REGISTERS
RW1
RL0 RL1
For Ordering Information details, see page 15.
© NIDEC COPAL ELECTRONICS CORP.
Characteristics subject to change without notice
1
Doc. No. MD-2114 Rev. J
1 page  
D.C. OPERATING CHARACTERISTICS
Over recommended operating conditions unless otherwise stated.
Symbol
ICC
ISB
ILI
ILO
VIL
VIH
VOL1
Parameter
Power Supply Current
Standby Current (VCC = 5.0V)
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage (VCC = 3.0V)
Test Conditions
fSCK = 2MHz, SO
Open Inputs = GND
VIN = GND or VCC; SO Open
VIN = GND to VCC
VOUT = GND to VCC
IOL = 3 mA
DP7411
Min Max Units
1 mA
-1
VCC x 0.7
1
10
10
VCC x 0.3
VCC + 1.0
0.4
µA
µA
µA
V
V
V
PIN CAPACITANCE(1)
Applicable over recommended operating range from TA = 25°C , f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Symbol Test Conditions
Min Typ Max Units Conditions
COUT
CIN
Output Capacitance (SO)
Input Capacitance (¯C¯S¯, SCK, SI, ¯W¯P¯, H¯¯O¯L¯D¯)
8 pF VOUT = 0V
6 pF VIN = 0V
POWER UP TIMING (1)
Over recommended operating conditions unless otherwise stated.
Symbol Parameter
tPUR(2)
tPUW(2)
Power-up to Read Operation
Power-up to Write Operation
Min Typ Max Units
1 ms
1 ms
Notes:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
© NIDEC COPAL ELECTRONICS CORP.
Characteristics subject to change without notice
5
Doc. No. MD-2114 Rev. J
5 Page 
Figure 7. Increment/Decrement Timing Limits
INC/DEC
Command
Issued
SCK
SI
RW Voltage Out
DP7411
tWRL
INSTRUCTION FORMAT
Read Wiper Control Register (WCR)
DEVICE ADDRESS
INSTRUCTION
DATA
¯C¯S¯ 0 1 0 1 0 0 A1 A0 1 0 0 1 0
0 0 P0 7 6 5 4 3 2 1 0
00
¯C¯S¯
Write Wiper Control Register (WCR)
DEVICE ADDRESS
INSTRUCTION
DATA
¯C¯S¯ 0 1 0 1 0 0 A1 A0 1 0 1 0 0
0 0 P0 7 6 5 4 3 2 1 0
00
¯C¯S¯
Read Data Register (DR)
DEVICE ADDRESS
INSTRUCTION
DATA
¯C¯S¯ 0 1 0 1 0 0 A1 A0 1 0 1 1 R1 R0 0 P0 7 6 5 4 3 2 1 0
¯C¯S¯
Write Data Register (DR)
DEVICE ADDRESS
INSTRUCTION
DATA
¯C¯S¯ 0 1 0 1 0 0 A1 A0 1 1 0 0 R1 R0 0 P0 7 6 5 4 3 2 1 0
¯C¯S¯
High Voltage
Write Cycle
Read Status (WIP)
DEVICE ADDRESS
INSTRUCTION
DATA
¯C¯S¯ 0 1 0 1 0 0 A1 A0 0 1 0 1 0
0
0
1
7654321 W
00 I
¯C¯S¯
P
© NIDEC COPAL ELECTRONICS CORP.
Characteristics subject to change without notice
11
Doc. No. MD-2114 Rev. J
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet DP7411.PDF ] | |
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