|
|
PDF 74LVC1G123 Data sheet ( Hoja de datos )
| Número de pieza | 74LVC1G123 | |
| Descripción | Single retriggerable monostable multivibrator | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de 74LVC1G123 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
74LVC1G123
Single retriggerable monostable multivibrator; Schmitt trigger
inputs
Rev. 5 — 14 June 2016
Product data sheet
1. General description
The 74LVC1G123 is a single retriggerable monostable multivibrator with Schmitt trigger
inputs. Output pulse width is controlled by three methods:
1. The basic pulse is programmed by selection of an external resistor (REXT) and
capacitor (CEXT).
2. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW-going edge input (A) or the active HIGH-going edge input (B). By
repeating this process, the output pulse period (Q = HIGH) can be made as long as
desired. Alternatively an output delay can be terminated at any time by a LOW-going
edge on input CLR, which also inhibits the triggering.
3. An internal connection from CLR to the input gates makes it possible to trigger the
circuit by a HIGH-going signal at input CLR.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in a mixed 3.3 V and 5 V environment. Schmitt trigger inputs,
makes the circuit highly tolerant to slower input rise and fall times.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100 % duty factor
Direct reset terminates output pulse
Schmitt trigger on all inputs
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
Power-on-reset on outputs
Latch-up performance exceeds 100 mA
Direct interface with TTL levels
1 page  
NXP Semiconductors
74LVC1G123
Single retriggerable monostable multivibrator; Schmitt trigger inputs
6.2 Pin description
Table 3. Pin description
Symbol
A
B
CLR
GND
Q
CEXT
REXT/CEXT
VCC
Pin
1
2
3
4
5
6
7
8
7. Functional description
Description
negative-edge triggered input
positive-edge triggered input
direct reset LOW and positive-edge triggered input
ground (0 V)
active HIGH output
external capacitor connection
external resistor and capacitor connection
supply voltage
Table 4. Function table[1]
Input
Output
CLR
A
B
Q
L XXL
X H X L[2]
X X L L[2]
HL
H H
LH
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; = LOW-to-HIGH transition; = HIGH-to-LOW transition;
= one HIGH level output pulse;
= one LOW level output pulse.
[2] If the monostable was triggered before this condition was established, the pulse continues as programmed.
74LVC1G123
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 14 June 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 31
5 Page 
NXP Semiconductors
74LVC1G123
Single retriggerable monostable multivibrator; Schmitt trigger inputs
Table 9. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 18.
Symbol Parameter
Conditions
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min
Max
tpd
propagation
CLR to Q (trigger); see Figure 7
delay
CL = 15 pF;
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
CL = 30 pF or CL = 50 pF
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
tW pulse width input A LOW; B HIGH;
see Figure 7 and Figure 8
2.7 7.6 17.4 2.7
2.1 - 11.0 2.1
2.1 - 9.2 2.1
1.7 - 8.2 1.7
1.4 - 5.9 1.4
3.1 8.3 18.8 3.3
2.5 - 12.0 2.5
2.8 - 11.1 2.8
2.0 - 10.1 2.0
1.5 - 7.1 1.5
18.9 ns
12.0 ns
10.0 ns
8.9 ns
6.4 ns
20.3 ns
13.1 ns
12.1 ns
11.0 ns
7.7 ns
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
input CLR LOW;
see Figure 7 and Figure 9
8.0 -
4.0 -
3.0 -
3.0 -
2.5 -
- 8.0
- 4.0
- 3.0
- 3.0
- 2.5
- ns
- ns
- ns
- ns
- ns
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
8.0 -
4.0 -
3.0 -
3.0 -
2.5 -
- 8.0
- 4.0
- 3.0
- 3.0
- 2.5
- ns
- ns
- ns
- ns
- ns
74LVC1G123
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 14 June 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 31
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet 74LVC1G123.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 74LVC1G123 | Single retriggerable monostable multivibrator | NXP Semiconductors |
| 74LVC1G125 | SINGLE BUFFER GATE |  Diodes |
| 74LVC1G125 | Bus buffer/line driver | NXP Semiconductors |
| 74LVC1G126 | Bus buffer/line driver; 3-state | NXP Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |