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PDF MAX1288 Data sheet ( Hoja de datos )

Número de pieza MAX1288
Descripción 150ksps 12-Bit 2-Channel Single-Ended and 1-Channel True-Differential ADCs
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX1288 Hoja de datos, Descripción, Manual

19-2231; Rev 3; 8/10
EVAALVUAAILTAIOBNLEKIT
150ksps, 12-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs
General Description
The MAX1286–MAX1289 are low-cost, micropower, seri-
al output 12-bit analog-to-digital converters (ADCs)
available in a tiny 8-pin SOT23 and an 8-pin TDFN. The
MAX1286/MAX1288 operate with a single +5V supply.
The MAX1287/MAX1289 operate with a single +3V sup-
ply. The devices feature a successive-approximation
ADC, automatic shutdown, fast wakeup (1.4µs), and a
high-speed 3-wire interface. Power consumption is only
0.5mW (VDD = +2.7V) at the maximum sampling rate of
150ksps. AutoShutdown™ (0.2µA) between conversions
results in reduced power consumption at slower
throughput rates. The MAX1286/MAX1287 provide
2-channel, single-ended operations and accept input
signals from 0 to VREF. The MAX1288/MAX1289 accept
true-differential inputs ranging from 0 to VREF. Data is
accessed using an external clock through the 3-wire
SPI™-/QSPI™-/MICROWIRE™-compatible serial inter-
face. Excellent dynamic performance, low power, ease
of use, and small package size make these converters
ideal for portable battery-powered data-acquisition
applications, and for other applications that demand low
power consumption and minimal space.
Applications
Low-Power Data Acquisition
Portable Temperature Monitors
Flowmeters
Touch Screens
Pin Configurations
TOP VIEW
VDD 1
AIN1 (AIN+) 2
AIN2 (AIN-) 3
GND 4
MAX1286–
MAX1289
SOT23
8 SCLK
8 7 65
7 DOUT
6 CNVST
5 REF
MAX1286–
MAX1289
EP
+1 2 3 4
Features
o Single-Supply Operation
+3V (MAX1287/MAX1289)
+5V (MAX1286/MAX1288)
o Autoshutdown Between Conversions
o Low Power
245µA at 150ksps
150µA at 100ksps
15µA at 10ksps
2µA at 1ksps
0.2µA in Shutdown
o True-Differential Track/Hold, 150kHz Sampling Rate
o Software-Configurable Unipolar/Bipolar
Conversion (MAX1288/MAX1289 Only)
o SPI-/QSPI-/MICROWIRE-Compatible Interface for
DSPs and Processors
o Internal Conversion Clock
o 8-Pin SOT23 and 8-Pin TDFN Packages
Ordering Information
PART
PIN-PACKAGE
TOP MARK
MAX1286EKA-T
8 SOT23
AAFA
MAX1286ETA+T
8 TDFN-EP*
+AFR
MAX1287EKA-T
8 SOT23
AAEW
MAX1287ETA+T
8 TDFN-EP*
+AFN
MAX1288EKA-T
8 SOT23
AAFC
MAX1288ETA+T
8 TDFN-EP*
+AFT
MAX1289EKA-T
8 SOT23
AAEY
MAX1289ETA+T
8 TDFN-EP*
+AFP
Note: All devices specified over the -40°C to +85°C operating
range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
-Denotes a package containing lead(Pb).
*EP = Exposed pad.
( ) ARE FOR THE MAX1288/MAX1289
TDFN
AutoShutdown is a trademark of Maxim Integrated Products, Inc.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX1288 pdf
150ksps, 12-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs
Typical Operating Characteristics
(VDD = +3V, VREF = +2.5V for MAX1287/MAX1289. VDD = +5V, VREF = +4.096V for MAX1286/MAX1288; 0.1µF capacitor at REF,
fSCLK = 8MHz (50% duty cycle); AIN- = GND for MAX1288/MAX1289, TA = +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
1.0
0.8 MAX1287/MAX1289
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0 500 1000 1500 2000 2500 3000 3500 4000 4500
OUTPUT CODE
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
1.0
0.8 MAX1286/MAX1288
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0 500 1000 1500 2000 2500 3000 3500 4000 4500
OUTPUT CODE
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
1.0
0.8 MAX1286/MAX1288
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0 500 1000 1500 2000 2500 3000 3500 4000 4500
OUTPUT CODE
SUPPLY CURRENT
vs. SAMPLING RATE
1000
MAX1287/MAX1289
100
10
1
0
0 0.1 1 10 100 1000
SAMPLING RATE (ksps)
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
1.0
0.8 MAX1287/MAX1289
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0 500 1000 1500 2000 2500 3000 3500 4000 4500
OUTPUT CODE
SUPPLY CURRENT
vs. SAMPLING RATE
1000
MAX1286/MAX1288
100
10
1
0.1
0
0.1 1 10 100
SAMPLING RATE (ksps)
1000
380
360
340
320
300
280
260
240
220
200
180
2.7
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
3.2 3.7 4.2
VDD (V)
4.7
5.2
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
300
250
200
150
100
50
0
2.7 3.2 3.7 4.2 4.7 5.2
VDD (V)
SUPPLY CURRENT
vs. TEMPERATURE
430
MAX1286
380
330
280
230
180
-40 -20
0 20 40 60
TEMPERATURE (°C)
80
_______________________________________________________________________________________ 5

5 Page





MAX1288 arduino
150ksps, 12-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs
5) Activate SCLK for a minimum of 12 rising clock
edges. DOUT transitions on SCLK’s falling edge
and is available in MSB-first format. Observe the
SCLK to DOUT valid timing characteristic. Clock
data into the µP on SCLK’s rising edge.
SPI and MICROWIRE Interface
When using an SPI (Figure 8a) or MICROWIRE inter-
face (Figures 8a and 8b), set CPOL = CPHA = 0. Two
8-bit readings are necessary to obtain the entire 12-bit
result from the ADC. DOUT data transitions on the seri-
al clock’s falling edge and is clocked into the µP on
SCLK’s rising edge. The first 8-bit data stream contains
the first 8-bits of DOUT starting with the MSB. The sec-
ond 8-bit data stream contains the remaining four result
bits. DOUT then goes high impedance.
QSPI Interface
Using the high-speed QSPI interface (Figure 9a) with
CPOL = 0 and CPHA = 0, the MAX1286–MAX1289
support a maximum fSCLK of 8MHz. One 12- to 16-bit
reading is necessary to obtain the entire 12-bit result
from the ADC. DOUT data transitions on the serial
clock’s falling edge and is clocked into the µP on
SCLK’s rising edge. The first 12 bits are the data.
DOUT then goes high impedance (Figure 9b).
PIC16 and SSP Module and
PIC17 Interface
The MAX1286–MAX1289 are compatible with a
PIC16/PIC17 µC, using the synchronous serial port
(SSP) module
To establish SPI communication, connect the controller
as shown in Figure 10a and configure the PIC16/PIC17
as system master. This is done by initializing its syn-
chronous serial port control register (SSPCON) and
synchronous serial port status register (SSPSTAT) to
the bit patterns shown in Tables 1 and 2.
In SPI mode, the PIC16/PIC17 µCs allow 8 bits of data
to be synchronously transmitted and received simulta-
neously. Two consecutive 8-bit readings (Figure 10b)
are necessary to obtain the entire 12-bit result from the
ADC. DOUT data transitions on the serial clock’s falling
edge and is clocked into the µC on SCLK’s rising edge.
The first 8-bit data stream contains the first 8 data bits
starting with the MSB. The second data stream con-
tains the remaining bits, D3 through D0.
I/O
SCK
MISO
SPI
VDD
SS
CNVST
SCLK
DOUT
MAX1286–
MAX1289
I/O
SK
SI
MICROWIRE
CNVST
SCLK
DOUT
MAX1286–
MAX1289
Figure 8a. SPI Connections
Figure 8b. MICROWIRE Connections
Table 1. Detailed SSPCON Register Content
CONTROL BIT
WCOL
SSPOV
Bit 7
Bit 6
SSPEN
Bit 5
CKP
SSPM3
SSPM2
SSPM1
SSPM0
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MAX1286–MAX1289
SETTINGS
X
X
1
0
0
0
0
1
SYNCHRONOUS SERIAL PORT CONTROL REGISTER (SSPCON)
Write Collision Detection Bit
Receive Overflow Detect Bit
Synchronous Serial Port Enable Bit:
0: Disables serial port and configures these pins as I/O port pins.
1: Enables serial port and configures SCK, SDO, and SCI pins as serial port pins.
Clock Polarity Select Bit. CKP = 0 for SPI master mode selection.
Synchronous Serial Port Mode Select Bit. Sets SPI master mode and selects
FCLK = fOSC / 16.
______________________________________________________________________________________ 11

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