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PDF M25P05-A Data sheet ( Hoja de datos )
| Número de pieza | M25P05-A | |
| Descripción | 512 Kbits of flash memory / 50 MHz SPI bus interface | |
| Fabricantes | Numonyx | |
| Logotipo |  |
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M25P05-A
512-Kbit, serial flash memory, 50 MHz SPI bus interface
Features
■ 512 Kbits of flash memory
■ Page program (up to 256 bytes) in 1.4 ms
(typical)
■ Sector erase (256 Kbits) in 0.65 s (typical)
■ Bulk erase (512 Kbits) in 0.85 s (typical)
■ 2.3 to 3.6 V single supply voltage
■ SPI bus compatible serial interface
■ 50 MHz clock rate (maximum)
■ Deep power-down mode 1 µA (typical)
■ Electronic signatures
– JEDEC standard two-byte signature
(2010h)
– RES instruction, one-byte, signature (05h),
for backward compatibility
■ More than 100,000 erase/program cycles per
sector
■ More than 20 years data retention
■ ECOPACK® packages available
SO8 (MN)
150 mil width
VFQFPN8 (MP)
(MLP8)
TSSOP8 (DW)
UFDFPN8 (MB)
2 x 3 mm
April 2008
Rev 11
1/52
www.numonyx.com
1
1 page  
M25P05-A
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
SO, VFQFPN and TSSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Write enable (WREN) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Write disable (WRDI) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Read identification (RDID) instruction sequence and data-out sequence . . . . . . . . . . . . . 21
Read status register (RDSR) instruction sequence and data-out sequence . . . . . . . . . . . 23
Write status register (WRSR) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Read data bytes (READ) instruction sequence and data-out sequence . . . . . . . . . . . . . . 26
Read data bytes at higher speed (FAST_READ) instruction sequence
and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Page program (PP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Sector erase (SE) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Bulk erase (BE) instruction sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Deep power-down (DP) instruction sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Release from deep power-down and read electronic signature (RES)
instruction sequence and data-out sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Release from deep power-down (RES) instruction sequence . . . . . . . . . . . . . . . . . . . . . . 34
Power-up timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Serial input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Write protect setup and hold timing during WRSR when SRWD =1. . . . . . . . . . . . . . . . . . 43
Hold timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
SO8N – 8 lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 45
VFQFPN8 (MLP8) - 8 lead very thin fine pitch quad flat package no lead,
6 × 5 mm, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
TSSOP8 – 8 lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 47
UFDFPN8 (MLP8) – 8 lead ultra thin fine pitch dual flat package no lead,
2 x 3 mm package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
5/52
5 Page 
M25P05-A
SPI modes
Example: Cp = 50 pF, that is R*Cp = 5 µs <=> the application must ensure that the bus
master never leaves the SPI bus in the high impedance state for a time period shorter than
5 µs.
Figure 4. SPI modes supported
CPOL CPHA
0 0C
1 1C
D MSB
Q MSB
AI01438B
11/52
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet M25P05-A.PDF ] | |
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