DataSheet39.com

What is UT8SF2M32?

This electronic component, produced by the manufacturer "Aeroflex Circuit Technology", performs the same function as "64Megabit Flow-thru SSRAM".


UT8SF2M32 Datasheet PDF - Aeroflex Circuit Technology

Part Number UT8SF2M32
Description 64Megabit Flow-thru SSRAM
Manufacturers Aeroflex Circuit Technology 
Logo Aeroflex Circuit Technology Logo 


There is a preview and UT8SF2M32 download ( pdf file ) link at the bottom of this page.





Total 27 Pages



Preview 1 page

No Preview Available ! UT8SF2M32 datasheet, circuit

Standard Products
UT8SF2M32 64Megabit Flow-thru SSRAM
Preliminary Datasheet
www.aeroflex.com/memories
April 2015
FEATURES
Synchronous SRAM organized as 2Meg words x 32bit
Continuous Data Transfer (CDT) architecture eliminates
wait states between read and write operations
Supports 40MHz to 80MHz bus operations
Internally self-timed output buffer control eliminates the
need for synchronous output enable
Registered inputs for flow-thru operations
Single 2.5V to 3.3V supply
Clock-to-output times
- Clk to Q = 12ns
Clock Enable (CEN) pin to enable clock and suspend
operation
Synchronous self-timed writes
Three Chip Enables (CS0, CS1, CS2) for simple depth
expansion
"ZZ" Sleep Mode option for partial power-down
"SHUTDOWN" Mode option for deep power-down
Four Word Burst Capability--linear or interleaved
Operational Environment
- Total Dose: 100 krad(Si)
- SEL Immune: 100MeV-cm2/mg
- SEU error rate: 1 x 10 -15errors/bit-day
with internal error correction
Package options:
- 288-lead CLGA, CCGA, and CBGA
Standard Microelectronics Drawing (SMD) 5962-15214
- QMLQ and Q+ pending
INTRODUCTION
The UT8SF2M32 is a high performance 67,108,864-bit
synchronous static random access memory (SSRAM) device
that is organized as 2M words of 32 bits. This device is
equipped with three chip selects (CS0, CS1, and CS2), a write
enable (WE), and an output enable (OE) pin, allowing for
significant design flexibility without bus contention. The
device supports a four word burst function using (ADV_LD).
The device achieves a very low error rate by employing
SECDED (single error correction double error detection)
EDAC (error detection and correction) scheme during read/
write operations as well as additional autonomous data
scrubbing. The data scrubbing is performed in the background
and is invisible to the user.
All synchronous inputs are registered on the rising edge of the
clock provided the Clock Enable (CEN) input is enabled LOW.
Operations are suspended when CEN is disabled HIGH and the
previous operation is extended. Write operation control signals
are WE and FLSH_PIPE. All write operations are performed
by internal self-timed circuitry.
For easy bank selection, three synchronous Chip Enables
(CS0, CS1, CS2) and an asynchronous Output Enable (OE)
provide for output tri-state control. The output drivers are
synchronously tri-stated during the data portion of a write
sequence to avoid bus contention.
36-00-01-006
Ver. 1.9.4
1 Aeroflex Microelectronics Solutions - HiRel

line_dark_gray
UT8SF2M32 equivalent
NUIL
NUIH
NC
TDO4
TDI4
TMS4
TCK4
Not used Input Low: Pins designated as NUIL need to be externally
connected by user to VSS Q through a >10k±10% resistor.
Not used Input High: Pins designated as NUIH need to be externally
connected by user to VDDQ through a >10k±10% resistor.
No Connects. Not internally connected to the die.
JTAG circuit serial data output. Package pin requires a pull-up through
>10k±10% resistor to VDDQ.
JTAG circuit serial data input. Device pin internally connected through a
75k±10% resistor to VDDQ.
JTAG controller Test Mode Select. Device pin internally connected through
a 75k±10% resistor to VDDQ.
JTAG circuit Clock input. Package pin requires a pull-up through
>10k±10% resistor to VDDQ.
--
--
---
JTAG Serial Output
Synchronous
JTAG Serial Input
Synchronous
Test Mode Select
Synchronous
JTAG Clock
Note:
1. DQ[51:32] are ignore during write and tri-stated during read activities unless EDACEN is deselected. (See Read Access Error Correction and Detection page 6.)
2. Reference application note AN-MEM-004 for additional READY signal information.
3. DC inputs are established at power up and cannot be switched while power is applied to the device.
4. Reference application note AN-MEM-05 for JTAG operations. JTAG operations are intended for terrestrial use and not guaranteed in radiation environment.
36-00-01-006
Ver. 1.9.4
5 Aeroflex Microelectronics Solutions - HiRel


line_dark_gray

Preview 5 Page


Part Details

On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for UT8SF2M32 electronic component.


Information Total 27 Pages
Link URL [ Copy URL to Clipboard ]
Download [ UT8SF2M32.PDF Datasheet ]

Share Link :

Electronic Components Distributor


An electronic components distributor is a company that sources, stocks, and sells electronic components to manufacturers, engineers, and hobbyists.


SparkFun Electronics Allied Electronics DigiKey Electronics Arrow Electronics
Mouser Electronics Adafruit Newark Chip One Stop


Featured Datasheets

Part NumberDescriptionMFRS
UT8SF2M32The function is 64Megabit Flow-thru SSRAM. Aeroflex Circuit TechnologyAeroflex Circuit Technology

Semiconductors commonly used in industry:

1N4148   |   BAW56   |   1N5400   |   NE555   |  

LM324   |   BC327   |   IRF840  |   2N3904   |  



Quick jump to:

UT8S     1N4     2N2     2SA     2SC     74H     BC     HCF     IRF     KA    

LA     LM     MC     NE     ST     STK     TDA     TL     UA    



Privacy Policy   |    Contact Us     |    New    |    Search