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Aeroflex Circuit Technology - Schmitt CMOS 16-bit Bidirectional MultiPurpose Registered Transceiver

Numéro de référence UT54ACS164646S
Description Schmitt CMOS 16-bit Bidirectional MultiPurpose Registered Transceiver
Fabricant Aeroflex Circuit Technology 
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UT54ACS164646S fiche technique
Standard Products
UT54ACS164646S
Schmitt CMOS 16-bit Bidirectional MultiPurpose Registered Transceiver
Datasheet
May 17, 2012
www.aeroflex.com/16bitLogic
FEATURES
Flexible voltage operation
- 5V bus to 3.3V bus
- 3.3V bus to 5V bus
- 5V bus to 5V bus
- 3.3V bus to 3.3V bus
Independent registers for A and B buses
Multiplexed real-time and stored data
Flow-through architecture optimizes PCB layout
Cold- and Warm-sparing
- 750kminimum input impedance power-off
- Guranteed output tri-state while one power supply is "off"
and the other is "on"
Schmitt trigger inputs to filter noisy signals
All inputs are 5V tolerant regardless of power supply voltage
m CRH CMOS Technology
Operational Environment:
- Total dose: 100K rad(Si)
- Single Event Latchup immune>110 MeV-cm2/mg
- SEU Onset LET >75 MeV-cm2/mg
High speed, low power consumption
Available QML Q or V processes
Standard Microcircuit Drawing: 5962-06234
Package:
- 56-pin ceramic flatpack
PIN DESCRIPTION
Pin Names
Description
xOE
xDIR
Output Enable Input (Active Low)
Direction Control Inputs
xAx Side A Inputs or 3-State Outputs (3.3V Port)
xBx Side B Inputs or 3-State Outputs (5V Port)
xSAB
Select real-time or stored A bus data to B bus
xSBA
xCLKAB
Select real-time or stored B bus data to A bus
Store A bus data
xCLKBA
Store B bus data
DESCRIPTION
The UT54ACS164646S is a 16-bit, MultiPurpose, registered,
level shifting, bus transceiver consisting of D-type flip-flops,
control circuitry, and 3-state outputs arranged for multiplexed
transmission of data directly from the data bus or from the
internal storage registers. The high-speed, low power
UT54ACS164646S transceiver is designed to perform multi-
ple functions including: asynchronous two-way communica-
tion, signal buffering, voltage translation, cold- and warm-
sparing. The device can be used as two independant 8-bit
transceivers or one 16-bit transceiver. Data on the A or B bus
is clocked into the registers on the rising edge of the appropri-
ate clock (xCLKAB or xCLKBA) input. With either VDD sup-
ply equal to zero volts, the UT54ACS164646S outputs and
inputs present a minimum impedance of 750kmaking it
ideal for “cold-spare” and "warm-spare" applications. By vir-
tue of its flexible power supply interface, the
UT54ACS164646S may operate as a 3.3-volt only, 5-volt only,
or mixed 3.3V/5V bus transceiver.
The Output-enable (xOE) and direction-control (xDIR) inputs
are provided to control the tri-state function and input/output
direction of the transceiver respectively. The select controls
(xSAB and xSBA) select whether stored register data or real-
time data is driven to the outputs as determined by the xDIR
inputs. The circuitry used for select control eliminates the typ-
ical decoding glitch that occurs in a multiplexer during the
transition between stored and real-time data. Regardless of the
selected operating mode ("real-time" or "recall"), a rising edge
on the port input clocks (xCLKAB and xCLKBA) will latch
the corresponding I/O states into their respective registers.
Furthermore, when a data port is isolated (xOE = high), A-port
data may be stored into its corresponding register while B-port
data may be independantly stored into its corresponding regis-
ters. Therefore, when an output function is disabled, the input
function is still enabled and may be used to store and transmit
data. Lastly, only one of the two buses, xA-port or xB-port,
may be driven at a time.
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