UT54ACTS245 Datasheet PDF - Aeroflex Circuit Technology
| Part Number | UT54ACTS245 | |
| Description | Octal Bus Transceiver | |
| Manufacturers | Aeroflex Circuit Technology | |
| Logo |  |
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Standard Products
UT54ACS245/UT54ACTS245
Octal Bus Transceiver with Three-State Outputs
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
Three-state outputs drive bus line directly
1.2μ CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
- 20-lead flatpack
UT54ACS245 - SMD 5962-96572
UT54ACTS245 - SMD 5962-96573
DESCRIPTION
The UT54ACS245 and the UT54ACTS245 are non-inverting
octal bus transceivers designed for asynchronous two-way com-
munication between data buses. The control function imple-
mentation minimizes external timing requirements.
The devices allow data transmission from the A bus to the B bus
or from the B bus to the A bus depending upon the logic level
at the direction control (DIR) input. The enable input (G) dis-
ables the device so that the buses are effectively isolated.
The devices are characterized over full military temperature
range of -55°C to +125°C.
FUNCTION TABLE
ENABLE DIRECTION
G CONTROL DIR
OPERATION
LL
B Data To A Bus
LH
A Data To B Bus
HX
Isolation
PINOUTS
DIR
A1
A2
A3
A4
A5
A6
A7
A8
VSS
20-Pin DIP
Top View
DIR 1 20 VDD
A1 2 19 G
A2 3 18 B1
A3 4 17 B2
A4 5 16 B3
A5 6 15 B4
A6 7 14 B5
A7 8 13 B6
A8 9 12 B7
VSS 10 11 B8
20-Lead Flatpack
Top View
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VDD
G
B1
B2
B3
B4
B5
B6
B7
B8
LOGIC SYMBOL
(19)
G
(1)
DIR
(2)
A1
(3)
A2
(4)
A3
(5)
A4
(6)
A5
(7)
A6
(8)
A7
A8 (9)
G3
3 EN1 (BA)
3 EN2 (AB)
1
2
(18)
B1
(17)
B2
(16)
B3
(15)
B4
(14)
B5
(13)
(12) B6
B7
(11)
B8
Note:
1 1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
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Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, -
50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density ≤ 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765
pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose ≤ 1E6 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
5
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| Information | Total 10 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ UT54ACTS245.PDF Datasheet ] | |
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