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PDF UT54ACTS220 Data sheet ( Hoja de datos )
| Número de pieza | UT54ACTS220 | |
| Descripción | Clock and Wait-State Generation Circuit | |
| Fabricantes | Aeroflex Circuit Technology | |
| Logotipo |  |
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Standard Products
UT54ACTS220
Clock and Wait-State Generation Circuit
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
1.2μ CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 14-pin DIP
- 14-lead flatpack
UT54ACTS220 - SMD 5962-96753
DESCRIPTION
The UT54ACTS220 is designed to be a companion chip to
UTMC’s UT69151 SμMMIT family for the purpose of gener-
ating clock and wait-state signals. The device contains a divide
by two circuit that accepts TTL input levels and drives CMOS
output buffers. The chip accepts a 48MHz clock and generates
a 24MHz clock. The 48MHz clock can have a duty cycle that
varies by ± 20%. The UT54ACT220 generates a 24MHz clock
with a ± 5% duty cycle variation. The wait-state circuit generates
a single wait-state by delaying the falling edge of DTACK into
the SμMMIT. The clock/timing device generates DTACK from
the falling edge of input RCS which is synchronized by the fall-
ing edge of 24MHz. The SμMMIT drives inputs RCS and
DMACK.
The devices are characterized over full military temperature
range of -55°C to +125°C.
LOGIC SYMBOL
MRST (10)
S
PINOUTS
14-Pin DIP
Top View
NC 1 14 VDD
CLKOUT 2 13 24MHz
CLKOUT 3 12 DTACK
CLKIN 4 11
TEST
NC 5 10 MRST
48MHz 6
9 RCS
VSS 7
8 DMACK
NC
CLKOUT
CLKOUT
CLKIN
NC
48MHz
VSS
14-Lead Flatpack
Top View
1 14
2 13
3 12
4 11
5 10
69
78
VDD
24MHz
DTACK
TEST
MRST
RCS
DMACK
48MHz (6)
RCS (9)
DMACK (8)
CTR1
SRG2
1D
S
(13)
24MHz
(12)
DTACK
(11)
TEST
(4)
CLKIN
(2)
CLKOUT
(3)
CLKOUT
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
1
1 page  
DC ELECTRICAL CHARACTERISTICS 7
(VDD = 5.0V ±10%; VSS = 0V 6, -55°C < TC < +125°C); Unless otherwise noted, Tc is per the temperature range ordered.
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
VIL Low-level input voltage 1
TTL
0.8 V
VIH High-level input voltage 1
TTL
2.25 V
IIN Input leakage current
TTL
VDD = 5.5V
VIN = VDD or VSS -1 1 μA
VOL1
Low-level output voltage 3
Except CLKOUT/CLKOUT
IOL = 8mA, VDD = 4.5V
IOL = 100μA
0.4
0.25 V
VOH1
High-level output voltage 3
Except CLKOUT/CLKOUT
IOH = -8mA, VDD = 4.5V
3.15
V
VOL2
CLKOUT/CLKOUT Low-level output
voltage 3
IOL = 100μA
0.25
V
VOH2
CLKOUT/CLKOUT High-level output
voltage 3
IOH = -100μA
4.25
V
IOS Short-circuit output current 2 ,4
VO = VDD and VSS
VDD = 5.5V
+300
mA
IOL1 Output current10
(Sink), Except CLKOUT/CLKOUT
VIN = VDD or VSS
VOL = 0.4V
8
mA
IOH1
Output current10
(Source), Except CLKOUT/CLKOUT
VIN = VDD or VSS
VOH = VDD - 0.4V
-8
mA
IOL2
CLKOUT/CLKOUT output current10
VIN = VDD or VSS
(Sink)
VOL = 0.4V
12
mA
IOH2
IIH
IIL
Ptotal
IDDQ
CLKOUT/CLKOUT output current10
(Source)
Input current high
Input current low
Power dissipation 2, 8, 9
Quiescent Supply Current
VIN = VDD or VSS
VOH = VDD - 0.4V
VIN = VDD or VSS
VIN = 5.5V
VIN = VDD or VSS
VIN = VSS
CL = 50pF
VDD = 5.5V
VIN = VDD or VSS
-12 mA
+1.0 μA
-1.0 μA
1.0 mW/
MHz
10 μA
5
5 Page 
UT54ACTS220: SMD
5962 * ***** ** * * *
Lead Finish: (Notes 1 & 2)
A = Solder
C = Gold
X = Optional
Package Type:
X = 14-lead ceramic bottom-brazed dual-in-line Flatpack
C = 14-lead ceramic side-brazed dip
Class Designator:
Q = QML Class Q
V = QML Class V
Device Type:
01
Drawing Number:
96753 = UT54ACTS220
Total Dose: (Notes 3 & 4)
R = 1E5 rads(Si)
F = 3E5 rads(Si)
G = 5E5 rads(Si)
H = 1E6 rads(Si)
Notes:
1. Lead finish (A,C, or X) must be specified.
2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).
3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For prototype inquiries, contact factory.
4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test Method 1019
Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5 rads(Si), and is tested in
accordance with MIL-STD-883 Test Method 1019 Condition A.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet UT54ACTS220.PDF ] | |
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