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UT54ACS273 fiches techniques PDF

Aeroflex Circuit Technology - Octal D-Flip-Flops

Numéro de référence UT54ACS273
Description Octal D-Flip-Flops
Fabricant Aeroflex Circuit Technology 
Logo Aeroflex Circuit Technology 





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UT54ACS273 fiche technique
Standard Products
UT54ACS273/UT54ACTS273
Octal D-Flip-Flops with Clear
Datasheet
December 16, 2011
www.aeroflex.com/logic
FEATURES
Contains eight flip-flops with single-rail outputs
Buffered clock and direct clear inputs
Individual data input to each flip-flop
Applications include:
- Buffer/storage registers, shift registers, and pattern
generators
 CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
- 20-lead flatpack
UT54ACS273 - SMD 5962-96578
UT54ACTS273 - SMD 5962-96579
DESCRIPTION
The UT54ACS273 and the UT54ACTS273 are positive-edge-
triggered D-type flip-flops with a direct clear input.
Information at the D inputs meeting the setup time requirements
is transferred to the Q outputs on the positive-going edge of the
clock pulse. When the clock input is at either the high or low
level, the D input signal has no effect at the output.
The devices are characterized over full military temperature
range of -55C to +125C.
FUNCTION TABLE
INPUTS
OUTPUTS
CLR
CLK
Dx
Qx
LXX
L
H H
H
H L
L
H L X No change
PINOUTS
20-Pin DIP
Top View
CLR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
VSS
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VDD
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
20-Lead Flatpack
Top View
CLR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
VSS
LOGIC SYMBOL
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VDD
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
CLR
CLK
(1)
(11)
1D (3)
2D (4)
3D (7)
4D (8)
5D
6D
(13)
(14)
7D (17)
8D (18)
R
C1
1D
(2)
(5) 1Q
(6)
2Q
3Q
(9)
(12)
(15)
(16)
(19)
4Q
5Q
6Q
7Q
8Q
1 Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984
and IEC Publication 617-12.

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