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PDF A29040D Data sheet ( Hoja de datos )
| Número de pieza | A29040D | |
| Descripción | Uniform Sector Flash Memory | |
| Fabricantes | AMIC | |
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A29040D Series
Preliminary
512K X 8 Bit CMOS 5.0 Volt-only,
Uniform Sector Flash Memory
Document Title
512K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory
Revision History
Rev. No. History
0.0 Initial issue
Issue Date
June 16, 2016
Remark
Preliminary
PRELIMINARY (June, 2016, Version 0.0)
AMIC Technology, Corp.
AMIC reserves the right to change products and specifications discussed herein without notice.
1 page  
A29040D Series
Absolute Maximum Ratings*
Ambient Operating Temperature ….……… -55°C to +125°C
Storage Temperature …………….…………. -65°C to +125°C
VCC to Ground ………………………………….. -2.0V to 6.5V
Output Voltage (Note 1) ………………………… -2.0V to 6.5V
A9 & OE (Note 2)……………………………… -2.0V to 11.5V
All other pins (Note 1) …………………………... -2.0V to 6.5V
Output Short Circuit Current (Note 3) ………………... 200mA
Notes:
1. Minimum DC voltage on input or I/O pins is -0.5V. During
voltage transitions, inputs may undershoot VSS to -2.0V
for periods of up to 20ns. Maximum DC voltage on output
and I/O pins is VCC +0.5V. During voltage transitions,
outputs may overshoot to VCC +1.5V for periods up to
20ns.
2. Minimum DC input voltage on A9 pins is -0.5V. During
voltage transitions, A9 and OE may overshoot VSS to -
2.0V for periods of up to 20ns. Maximum DC input
voltage on A9 and OE is +11.5V which may overshoot to
12.5V for periods up to 20ns.
3. No more than one output is shorted at a time. Duration of
the short circuit should not be greater than one second.
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above
those indicated in the operational sections of these
specification is not implied or intended. Exposure to
the absolute maximum rating conditions for extended periods
may affect device reliability.
Operating Ranges
Commercial Devices
Ambient Temperature (TA) …………………….. 0°C to +70°C
Extended Range Devices
Ambient Temperature (TA) …………………… -40°C to +85°C
VCC Supply Voltages
VCC for ± 10% devices ……………………….. +4.5V to +5.5V
Operating ranges define those limits between which the
functionally of the device is guaranteed.
Device Bus Operations
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register itself does
not occupy any addressable memory location. The register is
composed of latches that store the commands, along with
the address and data information needed to execute the
command. The contents of the register serve as inputs to the
internal state machine. The state machine outputs dictate the
function of the device. The appropriate device bus
operations table lists the inputs and control levels required,
and the resulting output. The following subsections describe
each of these operations in further detail.
Operation
Read
Write
CMOS Standby
TTL Standby
Output Disable
Table 1. A29040D Device Bus Operations
CE OE WE
L LH
L HL
VCC ± 0.5 V
X
X
H XX
L HH
A0 – A18
AIN
AIN
X
X
X
I/O0 - I/O7
DOUT
DIN
High-Z
High-Z
High-Z
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 10.5 ± 1.0V, X = Don't Care, DIN = Data In, DOUT = Data Out, AIN = Address In
Note: See the "Sector Protection/Unprotection" section, for more information.
PRELIMINARY (June, 2016, Version 0.0)
4
AMIC Technology, Corp.
5 Page 
A29040D Series
Table 4. A29040D Command Definitions
Command
Sequence
(Note 1)
Bus Cycles (Notes 2 - 4)
First
Second
Third
Fourth
Fifth
Sixth
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Read (Notes 5, 6)
1 RA RD
Reset (Note 6)
1 XXX F0
Manufacturer ID
4 555 AA 2AA 55 555 90 X00 37
Autoselect
(Note 7)
Device ID
Continuation ID
4 555 AA
4 555 AA
Sector Protect Verify
(Note 8)
4
555
AA
2AA 55
2AA 55
2AA 55
555
555
555
90 X01 86
90 X03 7F
90
SA
X02
00
01
Program
4 555 AA 2AA 55 555 A0 PA PD
Chip Erase
6 555 AA 2AA 55 555 80 555 AA 2AA 55 555 10
Sector Erase
6 555 AA 2AA 55 555 80 555 AA 2AA 55 SA 30
Erase Suspend (Note 9)
1 XXX B0
Erase Resume (Note 10)
1 XXX 30
Legend:
X = Don't care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE or CE pulse,
whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of WE or CE pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A18 - A16 select a unique sector.
Note:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operation.
4. Address bits A18 - A11 are don't cares for unlock and command cycles, unless SA or PA required.
5. No unlock or command cycles required when reading array data.
6. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O5 goes high
(while the device is providing status data).
7. The fourth cycle of the autoselect command sequence is a read cycle.
8. The data is 00h for an unprotected sector and 01h for a protected sector. See "Autoselect Command Sequence" for more
information.
9. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.
10. The Erase Resume command is valid only during the Erase Suspend mode.
PRELIMINARY (June, 2016, Version 0.0)
10
AMIC Technology, Corp.
11 Page | ||
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