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PDF A290011B Data sheet ( Hoja de datos )
| Número de pieza | A290011B | |
| Descripción | Boot Sector Flash Memory | |
| Fabricantes | AMIC | |
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Preliminary
A29001B/A290011B Series
128K X 8 Bit CMOS 5.0 Volt-only,
Boot Sector Flash Memory
Document Title
128K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory
Revision History
Rev. No. History
0.0 Initial issue
Issue Date
June 16, 2016
Remark
Preliminary
PRELIMINARY (June, 2016, Version 0.0)
AMIC Technology, Corp.
AMIC reserves the right to change products and specifications discussed herein without notice.
1 page  
A29001B/A290011B Series
Absolute Maximum Ratings*
Ambient Operating Temperature ……... -55°C to +125°C
Storage Temperature ............................. -65°C to +150°C
Ground to VCC……………………….……… -2.0V to 6.5V
Output Voltage (Note 1) …………………… -2.0V to 6.5V
A9, OE & RESET (Note 2)………………. -2.0V to 11.5V
All other pins (Note 1) ………………………. -2.0V to 6.5V
Output Short Circuit Current (Note 3) ……………. 200mA
Notes:
1. Minimum DC voltage on input or I/O pins is -0.5V.
During voltage transitions, inputs may undershoot
VSS to -2.0V for periods of up to 20ns. Maximum DC
voltage on output and I/O pins is VCC +0.5V. During
voltage transitions, outputs may overshoot to VCC
+1.5V for periods up to 20ns.
2. Minimum DC input voltage on A9 pins is -0.5V. During
voltage transitions, A9, OE and RESET may
overshoot VSS to -2.0V for periods of up to 20ns.
Maximum DC input voltage on A9 and OE is +11.5V
which may overshoot to 12.5V for periods up to 20ns.
(RESET is N/A on A290011B)
3. No more than one output is shorted at a time.
Duration of the short circuit should not be greater than
one second.
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above
those indicated in the operational sections of these
specification is not implied or intended. Exposure to
the absolute maximum rating conditions for extended
periods may affect device reliability.
Operating Ranges
Commercial Devices
Ambient Temperature (TA) ………………… 0°C to +70°C
Extended Range Devices
Ambient Temperature (TA) ……………… -40°C to +85°C
VCC Supply Voltages
VCC for ± 10% devices . . . . . . . . . . . . . . +4.5V to +5.5V
Operating ranges define those limits between which the
functionally of the device is guaranteed.
Device Bus Operations
This section describes the requirements and use of the
device bus operations, which are initiated through the
internal command register. The command register itself
does not occupy any addressable memory location. The
register is composed of latches that store the commands,
along with the address and data information needed to
execute the command. The contents of the register serve
as inputs to the internal state machine. The state
machine outputs dictate the function of the device. The
appropriate device bus operations table lists the inputs
and control levels required, and the resulting output. The
following subsections describe each of these operations
in further detail.
Table 1. A29001B/A290011B Device Bus Operations
Operation
CE OE
Read
Write
CMOS Standby
TTL Standby
Output Disable
Reset
Temporary Sector Unprotect (Note)
L
L
VCC ± 0.5 V
H
L
X
X
L
H
X
X
H
X
X
WE RESET A0 – A16
(N/A A290011B)
HH
AIN
LH
AIN
X VCC ± 0.5 V
X
X VCC ± 0.5 V
X
HH
X
XL
X
X VID
X
I/O0 - I/O7
DOUT
DIN
High-Z
High-Z
High-Z
High-Z
X
Legend:
L = Logic Low = VIL, H = Logic High = VIH, VID = 10.5 ± 1.0V, X = Don't Care, DIN = Data In, DOUT = Data Out, AIN = Address In
Note: 1. See the "Sector Protection/Unprotection" section and Temporary Sector Unprotect for more information.
2. This function is not available on A290011B.
PRELIMINARY (June, 2016, Version 0.0)
4
AMIC Technology, Corp.
5 Page 
command is ignored if written during the chip erase
operation or Embedded Program algorithm. Writing the
Erase Suspend command during the Sector Erase time-
out immediately terminates the time-out period and
suspends the erase operation. Addresses are "don't
cares" when writing the Erase Suspend command.
When the Erase Suspend command is written during a
sector erase operation, the device requires a maximum of
20μs to suspend the erase operation. However, when the
Erase Suspend command is written during the sector
erase time-out, the device immediately terminates the
time-out period and suspends the erase operation.
After the erase operation has been suspended, the system
can read array data from or program data to any sector
not selected for erasure. (The device "erase suspends" all
sectors selected for erasure.) Normal read and write
timings and command definitions apply. Reading at any
address within erase-suspended sectors produces status
data on I/O7 - I/O0. The system can use I/O7, or I/O6 and
I/O2 together, to determine if a sector is actively erasing or
is erase-suspended. See "Write Operation Status" for
information on these status bits.
After an erase-suspended program operation is complete,
the system can once again read array data within non-
suspended sectors. The system can determine the status
of the program operation using the I/O7 or I/O6 status bits,
just as in the standard program operation. See "Write
Operation Status" for more information.
The system may also write the autoselect command
sequence when the device is in the Erase Suspend mode.
The device allows reading autoselect codes even at
addresses within erasing sectors, since the codes are not
stored in the memory array. When the device exits the
autoselect mode, the device reverts to the Erase Suspend
mode, and is ready for another valid operation. See
"Autoselect Command Sequence" for more information.
The system must write the Erase Resume command
(address bits are "don't care") to exit the erase suspend
mode and continue the sector erase operation. Further
writes of the Resume command are ignored. Another
Erase Suspend command can be written after the device
has resumed erasing.
A29001B/A290011B Series
START
Write Erase
Command
Sequence
Data Poll
from System
No
Data = FFh ?
Embedded
Erase
algorithm in
progress
Yes
Erasure Completed
Note :
1. See the appropriate Command Definitions table for erase
command sequences.
2. See "I/O3 : Sector Erase Timer" for more information.
Figure 3. Erase Operation
PRELIMINARY (June, 2016, Version 0.0)
10
AMIC Technology, Corp.
11 Page | ||
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| PDF Descargar | [ Datasheet A290011B.PDF ] | |
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