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PDF HV7350K6-G Data sheet ( Hoja de datos )
| Número de pieza | HV7350K6-G | |
| Descripción | Ultrasound RTZ Pulser | |
| Fabricantes | Supertex | |
| Logotipo |  |
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Supertex inc.
HV7350
Eight-Channel, High Speed, ±60V, ±1.0A,
Ultrasound RTZ Pulser
Features
►► HVCMOS technology for high performance
►► High density integrated ultrasound transmitter
►► 0 to ±60V output voltage
►► ±1.0A source and sink current in pulse mode
►► ±1.0A source and sink current in RTZ mode
►► Up to 20MHz operating frequency
►► Matched delay times
►► Optional clock re-alignment
►► 3.3V CMOS logic interface and reference
►► +3.3V low voltage supply for VDD
►► Built-in linear regulators for floating gate driver
►► Built-in output drain diodes & bleed resistors
Application
►► Portable medical ultrasound imaging
►► Piezoelectric transducer drivers
►► Pulse waveform generator
General Description
The Supertex HV7350 is an eight channel monolithic high voltage high-
speed pulse generator with built-in fast return to zero damping FETs.
This high voltage and high-speed integrated circuit is designed for
portable medical ultrasound image devices.
HV7350 consists of a controller logic interface circuit, level translators,
MOSFET gate drives, and high current power P-channel and N-channel
MOSFETs as the output stage for each channel.
The output peak currents of each channel are guaranteed to be over
±1.0A with up to ±60V pulse swings as well as return-to-zero (RTZ)
mode. The gate drivers for the output MOSFETs are powered by built-in
linear 5.0V regulators referenced to VPP and VNN. This direct coupling
topology of the gate drivers not only saves four floating voltage supplies
or AC coupling capacitors per channel, but also makes the PCB layout
smaller and easier.
An input clock pin is available to realign all the logic input control lines to
a master clock. Precise logic timing is always essential in any ultrasound
systems.
Typical Application Circuit
+3.3V
0.1µF
+3.3V
1.0µF
1.0µF
+10 to +60V
1.0µF
1.0µF
REN
OEN
VLL VDD CPOS
CPF VPP
LRP
LRP
1 of 8 Channels
GND
+5.0V
VPF GND
RGND
3.3V Logic
PIN1
NIN1
PIN8
NIN8
CLK
Logic
&
Level
Translator
SUB
DAP GND
P-Driver
VPF
VNF
N-Driver
+5.0V
DMP
-5.0V
Rb
-5.0V
GND
GND
LRN
CNEG
1.0µF
VNF GND
LRN
RGND
CNF
VNN
1.0µF
1.0µF
-10 to -60V
Doc.# DSFP-HV7350
A011314
TX1 HVOUT1
RGND
X1
Supertex inc.
www.supertex.com
1 page  
Truth Table
Logic Inputs
OEN
1
CLK
VLL
PINX
0
1 VLL 1
1 VLL 0
1 VLL 1
10
11
10
11
0XX
NINX
0
0
1
1
0
0
1
1
X
Switching Time Diagram
VPP
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
CLK
PINn
(NINn = 0)
td1
50%
IOUT
50%
TXn 0A
td4
Asynchronous Mode
HV7350
VNN
OFF
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
TXn Output
RGND
Note
ON
OFF
OFF
Asynchronous Mode
Output change on PIN/NIN
OFF
ON
OFF
OFF
OFF
Synchronous Mode
Output change at retiming
clock(CLK) rising edge,
registered by PIN/NIN
OFF
Disabled
CLK
NINn
(PINn = 0)
50%
td2
td3
TXn
0A
50%
IOUT
CLK
CLK
Doc.# DSFP-HV7350
A011314
PINn
(NINn = 0)
tdc
TXn 0A
IOUT
50%
tdc
Synchronous Mode
5
NINn
(PINn = 0)
tdc
TXn 0A
50%
IOUT
tdc
Supertex inc.
www.supertex.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet HV7350K6-G.PDF ] | |
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