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PDF XRA1402 Data sheet ( Hoja de datos )
| Número de pieza | XRA1402 | |
| Descripción | 8-BIT SPI GPIO EXPANDER | |
| Fabricantes | Exar | |
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XRA1402
8-BIT SPI GPIO EXPANDER
SEPTEMBER 2011
REV. 1.0.0
GENERAL DESCRIPTION
The XRA1402 is an 8-bit GPIO expander with an SPI
interface. After power-up, the XRA1402 has internal
100K ohm pull-up resistors on each I/O pin that can
be individually enabled.
In addition, the GPIOs on the XRA1402 can
individually be controlled and configured. As outputs,
the GPIOs can be outputs that are high, low or in
three-state mode. The three-state mode feature is
useful for applications where the power is removed
from the remote devices, but they may still be
connected to the GPIO expander.
As inputs, the internal pull-up resistors can be
enabled or disabled and the input polarity can be
inverted. The interrupt can be programmed for
different behaviors. The interrupts can be
programmed to generate an interrupt on the rising
edge, falling edge or on both edges. The interrupt
can be cleared if the input changes back to its original
state or by reading the current state of the inputs.
The XRA1402 is available in 16-pin QFN and 16-pin
TSSOP packages.
FEATURES
• 1.65V to 3.6V operating voltage
• 8 General Purpose I/Os (GPIOs)
• 5V tolerant inputs
• Maximum stand-by current of 1uA at +1.8V
• SPI bus interface
■ SPI Clock Frequency up to 26MHz
• Individually programmable inputs
■ Internal pull-up resistors
■ Polarity inversion
■ Individual interrupt enable
■ Rising edge and/or Falling edge interrupt
■ Input filter
• Individually programmable outputs
■ Output Level Control
■ Output Three-State Control
• Open-drain active low interrupt output
• Active-low reset input
• 3kV HBM ESD protection per JESD22-A114F
• 200mA latch-up performance per JESD78B
APPLICATIONS
• Personal Digital Assistants (PDA)
• Cellular Phones/Data Devices
• Battery-Operated Devices
• Global Positioning System (GPS)
• Bluetooth
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com
1 page  
XRA1402
REV. 1.0.0
8-BIT SPI GPIO EXPANDER
1.1.1 SPI Command Byte
An SPI command byte is sent by the SPI master following the slave address. The command byte indicates the
address offset of the register that will be accessed. Table 2 below lists the command bytes for each register.
TABLE 2: COMMAND BYTE (REGISTER ADDRESS)
COMMAND BYTE
REGISTER NAME DESCRIPTION
READ/WRITE
DEFAULT VALUES
0x00
GSR - GPIO State
Read-Only
0xXX
0x01
OCR - Output Control
Read/Write
0xFF
0x02
PIR - Input Polarity Inversion
Read/Write
0x00
0x03
GCR - GPIO Configuration
Read/Write
0xFF
0x04
PUR - Input Internal Pull-up Resistor Enable/Disable
Read/Write
0x00
0x05
IER - Input Interrupt Enable
Read/Write
0x00
0x06
TSCR - Output Three-State Control
Read/Write
0x00
0x07
ISR - Input Interrupt Status
Read
0x00
0x08
REIR - Input Rising Edge Interrupt Enable
Read/Write
0x00
0x09
FEIR - Input Falling Edge Interrupt Enable
Read/Write
0x00
0x0A
IFR - Input Filter Enable/Disable
Read/Write
0xFF
1.2 Interrupts
The table below summarizes the interrupt behavior of the different register settings for the XRA1402.
TABLE 3: INTERRUPT GENERATION AND CLEARING
GCR IER REIR FEIR IFR
BIT BIT BIT BIT BIT
INTERRUPT GENERATED BY:
INTERRUPT CLEARED BY:
1 0 X X X No interrupts enabled (default)
N/A
0 A rising or falling edge on the input
1 1 0 0 1 A rising or falling edge on the input and
remains in the new state for more than
1075ns
Reading the GSR register or if the input
changes back to its previous state (state of
input during last read to GSR)
0 A rising edge on the input
Reading the GSR register
1 1 1 0 1 A rising edge on the input and remains high
for more than 1075ns
0 A falling edge on the input
Reading the GSR register
1 1 0 1 1 A falling edge on the input and remains low
for more than 1075ns
0 A rising or falling edge on the input
Reading the GSR register
1 1 1 1 1 A rising or falling edge on the input and
remains in the new state for more than
1075ns
0 x x x x No interrupts in output mode
N/A
5
5 Page 
REV. 1.0.0
FIGURE 5. SPI-BUS TIMING
CS#
TCSH
TCSS
SCLK
SI
TDS
TDH
...
TCL TCH
...
...
SO ...
FIGURE 6. READ INPUT PORT TO CLEAR GPIO INT
CS#
XRA1402
8-BIT SPI GPIO EXPANDER
TCSH
TCSW
TDO
TTR
SCL
SI 1 0 0 A3 A2 A1 A0 X
SO
INT#
D7 D6 D5 D4 D3 D2 D1 D0
TD13
11
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| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet XRA1402.PDF ] | |
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