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PDF HFA3842B Data sheet ( Hoja de datos )
| Número de pieza | HFA3842B | |
| Descripción | PCMCIA/USB Wireless LAN Medium Access Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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TM
PRELIMINARY
Data Sheet
HFA3842B
June 2001
File Number 8020
PCMCIA/USB Wireless LAN Medium
Access Controller
The Intersil HFA3842B Wireless LAN
Medium Access Controller is part of
the PRISM® 2.4GHz radio chip set.
The HFA3842B directly interfaces
with the Intersil HFA386x family of Baseband Processors,
offering a complete end-to-end chip set solution for wireless
LAN products. Protocol and PHY support are implemented in
firmware to allow custom protocol and different PHY
transceivers.
The HFA3842B is designed to provide maximum
performance with minimum power consumption. Package
pin layout provides optimal PC board layout to all user
interfaces including PCMCIA and USB.
Firmware implements the full IEEE 802.11 Wireless LAN
MAC protocol. It supports BSS and IBSS operation under
DCF, and operation under the optional Point Coordination
Function (PCF). Low level protocol functions such as
RTS/CTS generation and acknowledgement, fragmentation
and de-fragmentation, and automatic beacon monitoring are
handed without host intervention. Active scanning is
performed autonomously once initiated by host command.
Host interface command and status handshakes allow
concurrent operations from multi-threaded I/O drivers.
Additional firmware functions specific to access point
applications are also available.
Designing wireless protocol systems using the HFA3842B is
made easier with the availability of evaluation board, firm-
ware, software device drivers, and complete documentation.
The HFA3842B is a WLAN MAC Controller IC, based on the
HFA3841. Pin-for-pin upgrade replacement for the HFA3841.
Applications
• High Data Rate Wireless LAN
• PC Card Wireless LAN Adapters
• USB Wireless LAN Adapters
• PCI Wireless LAN Cards (Using Ext. Bridge Chip)
• Wireless LAN Modules
• Wireless LAN Access Points
• Wireless Bridge Products
• Wireless Point-to-Multipoint Systems
• ISA, ISA PNP WLAN Cards
Features
• USB Host Interface supports USB V1.1 at 12Mbps, and is
an alternative to the PC Card host interface.
• New start up modes allow the PCMCIA Card Information
Structure to be initialized from a serial EEPROM. This
allows firmware to be downloaded from the host,
eliminating the parallel Flash memory device.
• Firmware can be loaded from serial Flash memory.
• Direct attachment to a typical x16 SRAM using five control
signals (RAMCS_, MOE_, MWEL_, MLBE_, and MUBE_).
• Low frequency crystal oscillator to maintain time and allow
baseband clock source to power off during sleep mode.
• Improved performance of internal WEP engine.
• On-chip execution can now be viewed while in debug
mode.
• Independent programmable cycle timing for external chip
selects allows attachment of slow memory devices without
compromising higher speed instruction execution.
• Pinout is backward compatible with HFA3841.
• IEEE802.11 Standard Data Rates: 1, 2, 5.5 and 11Mbps
• Part of the Intersil PRISM Wireless LAN Chip Set
• Full Implementation of the MAC Protocol Specified in IEEE
Standards 802.11-1999 and 802.11b
• PCMCIA Host Interface Supports Full 16-Bit
Implementation of PC Card 16 (1995), also ISA PNP with
Additional Chip
• Host Interface Provides Dual Buffer Access Paths
• External Memory Interface Supports up to 4M bytes RAM
• Internal Encryption Engine Executes IEEE802.11 WEP
• Low Power Operation; 25mA Active, 8mA Doze, <1mA
Sleep
• Operation at 2.7V to 3.6V Supply
• 5V Tolerant Host Interface Input/Outputs
• 128 Pin LQFP Package Targeted for Type II PC Cards
• IEEE802.11 Wireless LAN MAC Protocol Firmware and
Microsoft® Windows® Software Drivers
• Pin for Pin Replacement for the HFA3841 Supporting all
Functions and operations of the HFA3841
Ordering Information
PART
NUMBER
TEMP. RANGE
(oC) PACKAGE
PKG. NO.
HFA3842BIN
-40 to 85 128 Ld LQFP Q128.14x20
HFA3842BIN-TK -40 to 85 Tape and Reel
Microsoft® and Windows® are registered trademarks of Microsoft Corporation.
PRISM® is a registered trademark of Intersil Americas Inc.
PRISM and design is a trademark of Intersil Americas Inc.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, All Rights Reserved
1 page  
PIN
20
19
18
17
31
30
32
29
65
8
7
9
35
34
33
63
64
21
22
23
15
27
26
28
43
12
11
93
NAME
RXC
RXD
TXC
TXD
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
PL0
PL1
PL2
PL3
PL4
PL5
PL6
PL7
HFA3842B
TABLE 5. PORT PIN USES FOR PRISM APPLICATION
PRISM I USE
PRISM II USE
RXC - Receive Clock
RXC - Receive Clock
RXD - Receive Data
RXD - Receive Data
TXC - Transmit Clock
TXC - Transmit Clock
TXD - Transmit Data
TXD - Transmit Data
SCLK - Clock for the SD Serial Bus
SCLK - Clock for the SD Serial Bus
SD - Serial Bidirectional Data Bus
SD - Serial Bi-Directional Data Bus
R/W - An input to the HFA3860A Used to Change
the Direction of the SD Bus When Reading or
Writing Data on the SD Bus
Not Used
CS - A Chip Select for the Device to Activate the CS_BAR - Chip Select for HFA3861 Baseband
Serial Control Port (Active Low)
(Active Low)
Not Used
PE1 - Power Enable 1
SYNTH_LE - Latches a Frame of 22 Bits After it has LE_IF - Load Enable for HFA3783 Quad IF
Been Shifted by the SCLK into the Synthesizer
Registers
LED - Activity Indicator
LED - Activity Indicator
Not Used
RADIO_PE - RF Power Enable
Not Used
LE_RF - Load Enable for HFA3683 RF Chip
Not Used
SYNTHCLK - Serial Clock to Front End Chips
Not Used
SYNTHDATA - Serial Data to Front End Chips
TX_PE_RF - Power Enable
PA_PE - Transmit PA Power Enable
RX_PE_RF - Power Enable
PE2 - Power Enable 2
MD_RDY - Header Data and Data Packet are
MDREADY - Header Data and Data Packet are
Ready to be Transferred From Baseband on RXD Ready to be Transferred from Baseband on RXD
CCA - Signal that the Channel is Clear to Transmit CCA - Signal that the Channel is Clear to Transmit
RADIO_PE - Master Power Control for the RF
Section
CAL_EN - Calibration Mode Enable
TX_PE and PA_PE - Transmit Enable to Baseband TX_PE - Transmit Enable to Baseband
RX_PE - Receive Enable to Baseband
RX_PE - Receive Enable to Baseband
RESET - Reset to Baseband
RESET_BB - Reset Baseband
Not Used
T/R-SW_BAR - Transient/Receive Control (Inverted)
MA19 (If Required)
MA19 (If Required)
MA20 (If Required)
MA20 (If Required) or USB+
MA21 (If Required)
MA21 (If Required) or USB-
TX_RDY - Baseband Ready to Receive Data on
TXD (Not Used By Firmware)
T/R_SW - Transmit/Receive Control
5
5 Page 
Waveforms (Continued)
RXDATA
RXCLK
tSURX_RDY
RX_RDY
RX_PE2
CCA
HFA3842B
tHRX_RDY
tDRX_PE2
tWRX_PE2
FIGURE 9. RX PATH
tCCAF
RXDATA
RXCLK
RXD_INT
RXCLK_INT
RXCLK_INT2
RXCLK_ONE
_SHOT
A
tRCHM
tSURXD
B
tHRXD
tRCLM
A
tRXCLK
C
B
FIGURE 10. EXPANDED RX TIMING
11
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet HFA3842B.PDF ] | |
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