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NP75P03YDG fiches techniques PDF

Renesas - N-channel Power MOS FET

Numéro de référence NP75P03YDG
Description N-channel Power MOS FET
Fabricant Renesas 
Logo Renesas 





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NP75P03YDG fiche technique
NP75P03YDG
MOS FIELD EFFECT TRANSISTOR
Preliminary Data Sheet
R07DS0020EJ0200
Rev.2.00
Mar 16, 2011
Description
The NP75P03YDG is P-channel MOS Field Effect Transistor designed for high current switching applications.
Features
Low on-state resistance
RDS(on) = 6.2 mΩ MAX. (VGS = 10 V, ID = 37.5 A)
Low Ciss: Ciss = 3200 pF TYP. (VDS = 25 V, VGS = 0 V)
Logic level drive type
Designed for automotive application and AEC-Q101 qualified
Small size package 8-pin HSON
Ordering Information
Part No.
NP75P03YDG -E1-AY 1
NP75P03YDG -E2-AY 1
LEAD PLATING
Pure Sn (Tin)
PACKING
Tape 2500 p/reel
Note: 1. Pb-free (This product does not contain Pb in the external electrode.)
Package
8-pin HSON, Taping (E1 type)
8-pin HSON, Taping (E2 type)
<R>
<R>
Absolute Maximum Ratings (TA = 25°C)
Item
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) 1
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C) 2
Channel Temperature
Storage Temperature
Single Avalanche Current 3
Single Avalanche Energy 3
Symbol
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
PT2
Tch
Tstg
IAS
EAS
Ratings
30
m20
m75
m225
138
1.0
175
55 to +175
27
73
Unit
V
V
A
A
W
W
°C
°C
A
mJ
<R>
Thermal Resistance
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance 2
Rth(ch-C)
Rth(ch-A)
1.09
150
°C/W
°C/W
Notes: 1. TC = 25°C, PW 10 μs, Duty Cycle 1%
2. Mounted on glass epoxy substrate of 40 mm x 40 mm x 0.8 mmt
*3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, L = 100 μH, VGS = 20 0 V
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
R07DS0020EJ0200 Rev.2.00
Mar 16, 2011
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