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ON Semiconductor - 1.8V Programmable OmniClock Generator

Numéro de référence NB3V63143G
Description 1.8V Programmable OmniClock Generator
Fabricant ON Semiconductor 
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NB3V63143G fiche technique
NB3V63143G
1.8 V Programmable
OmniClock Generator
with Single Ended (LVCMOS) and Differential
(LVDS/HCSL) Outputs with Individual Output
Enable and Individual VDDO
www.onsemi.com
The NB3V63143G, which is a member of the OmniClock family, is
a one−time programmable (OTP), low power PLL−based clock
generator that supports any output frequency from 8 kHz to 200 MHz.
The device accepts fundamental mode parallel resonant crystal or a
single ended (LVCMOS) reference clock as input. It generates either
1
QFN16
CASE 485AE
three single ended (LVCMOS) outputs, or one single ended output and
one differential (LVDS/HCSL) output. The output signals can be
MARKING DIAGRAM
modulated using the spread spectrum feature of the PLL
(programmable spread spectrum type, deviation and rate) for
applications demanding low electromagnetic interference (EMI).
Individual output enable pins OE[2:0] are available to enable/disable
3V631
43Gxx
ALYWG
G
the outputs. Individual output voltage pins VDDO[2:0] are available
to independently set the output voltage of each output. Up to four
different configurations can be written into the device memory. Two
selection pins (SEL[1:0]) allow the user to select the configuration to
use. Using the PLL bypass mode, it is possible to get a copy of the
input clock on any or all of the outputs. The device can be powered
3V63143G
xx
A
L
Y
= Specific Device Code
= Specific Program Code (Default
‘00’ for Unprogrammed Part)
= Assembly Location
= Wafer Lot
= Year
down using the Power Down pin (PD#). It is possible to program the
W
= Work Week
internal input crystal load capacitance and the output drive current
G
= Pb−Free Package
provided by the device. The device also has automatic gain control
(Note: Microdot may be in either location)
(crystal power limiting) circuitry which avoids the device overdriving
the external crystal.
ORDERING INFORMATION
See detailed ordering and shipping information on page 20 of
this data sheet.
Features
Member of the OmniClock Family of Programmable
Programmable Internal Crystal Load Capacitors
Clock Generators
Operating Power Supply: 1.8 V ± 0.1 V
Programmable Output Drive Current for Single Ended
Outputs
I/O Standards
Power Saving Mode through Power Down Pin
Inputs: LVCMOS, Fundamental Mode Crystal
Programmable PLL Bypass Mode
Outputs: 1.8 V LVCMOS
Outputs: LVDS and HCSL
3 Programmable Single Ended (LVCMOS) Outputs
from 8 kHz to 200 MHz
1 Programmable Differential Clock Output up to
200 MHz
Input Frequency Range
Programmable Output Inversion
Programming and Evaluation Kit Available for Field
Programming and Quick Evaluation
Temperature Range −40°C to 85°C
Packaged in 16−pin QFN
These are Pb−Free Devices
Crystal: 3 MHz to 50 MHz
Reference Clock: 3 MHz to 200 MHz
Typical Applications
eBooks and Media Players
Configurable Spread Spectrum Frequency Modulation
Smart Wearables, Smart Phones, Portable Medical and
Parameters (Type, Deviation, Rate)
Industrial Equipment
Individual Output Enable Pins
Set Top Boxes, Printers, Digital Cameras and
Independent Output Voltage Pins
Camcorders
© Semiconductor Components Industries, LLC, 2016
January, 2016 − Rev. 2
1
Publication Order Number:
NB3V63143G/D

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