|
|
PDF LAN8740A Data sheet ( Hoja de datos )
| Número de pieza | LAN8740A | |
| Descripción | Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver | |
| Fabricantes | Microchip | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de LAN8740A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
LAN8740A/LAN8740Ai
Small Footprint MII/RMII 10/100 Energy Efficient Ethernet
Transceiver with HP Auto-MDIX and flexPWR® Technology
Highlights
• Single-Chip Ethernet Physical Layer Transceiver
(PHY)
• Compliant with Energy Efficient Ethernet 802.3az
• Cable diagnostic support
• Wake on LAN (WoL) support
• Comprehensive flexPWR technology
- Flexible power management architecture
- LVCMOS Variable I/O voltage range: +1.8 V to
+3.3 V
- Integrated 1.2 V regulator with disable feature
• HP Auto-MDIX support
• Small footprint 32-pin VQFN, RoHS-compliant
package (5 x 5 x 0.9 mm height)
• Deterministic 100 Mb internal loopback latency
(MII Mode)
Target Applications
• Set-Top Boxes
• Networked Printers and Servers
• Test Instrumentation
• LAN on Motherboard
• Embedded Telecom Applications
• Video Record/Playback Systems
• Cable Modems/Routers
• DSL Modems/Routers
• Digital Video Recorders
• IP and Video Phones
• Wireless Access Points
• Digital Televisions
• Digital Media Adapters/Servers
• Gaming Consoles
• POE Applications
(Refer to Microchip Application Note 17.18)
Key Benefits
• High-performance 10/100 Ethernet transceiver
- Compliant with IEEE802.3/802.3u (Fast Ethernet)
- Compliant with ISO 802-3/IEEE 802.3
(10BASE-T)
- Compliant with Energy Efficient Ethernet IEEE
802.3az
- Loop-back modes
- Auto-negotiation
- Automatic polarity detection and correction
- Link status change wake-up detection
- Vendor specific register functions
- Supports both MII and the reduced pin count RMII
interfaces
• Power and I/Os
- Various low power modes
- Integrated power-on reset circuit
- Two status LED outputs
- May be used with a single 3.3 V supply
• Additional Features
- Ability to use a low cost 25 MHz crystal for
reduced BOM
• Packaging
- 32-pin VQFN (5 x 5 mm), RoHS-compliant
package with MII and RMII
• Environmental
- Commercial temperature range (0°C to +70°C)
- Industrial temperature range (-40°C to +85°C)
2013-2015 Microchip Technology Inc.
DS00001987A-page 1
1 page  
LAN8740A/LAN8740Ai
The LAN8740A/LAN8740Ai is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature
range versions. A typical system application is shown in Figure 1-1. Figure 1-2 provides an internal block diagram of the
device.
FIGURE 1-1:
SYSTEM BLOCK DIAGRAM
10/100
Ethernet
MAC
MII/
RMII
Mode
LAN8740A/
LAN8740Ai
MDI Transformer
LED
RJ45
Crystal or
Clock
Oscillator
FIGURE 1-2:
ARCHITECTURAL OVERVIEW
MODE[0:2]
nRST
RMIISEL
TXD[0:3]
TXEN
TXER
TXCLK
RXD[0:3]
RXDV
RXER
RXCLK
CRS
COL/CRS_DV
MDC
MDIO
Mode Control
Reset Control
Auto-
Negotiation
SMI Management
Control
100M RX
Logic
WoL
10M RX
Logic
100M TX
Logic
100M
Transmitter
Transmitter
10M TX
Logic
10M
Transmitter
DSP System:
Clock
Data Recovery
Equalizer
Receiver
10M PLL
Analog-to-
Digital
100M PLL
Squeltch
& Filters
LAN8740A/LAN8740Ai
HP Auto-MDIX
TXP/TXN
RXP/RXN
MDIX
Control
PLL
Interrupt
Generator
LEDs
XTAL1/CLKIN
XTAL2
nINT
LED1
LED2
Central Bias
RBIAS
PHY Address
Latches
PHYAD[0:2]
2013-2015 Microchip Technology Inc.
DS00001987A-page 5
5 Page 
LAN8740A/LAN8740Ai
TABLE 2-2:
Num Pins
1
LED PINS
Name
LED 1
Symbol
LED1
Interrupt Out-
put
nINT
Power Man-
agement Event
Output
nPME
Regulator Off
Configuration
Strap
REGOFF
Buffer Type
O12
O12
O12
IS
(PD)
Description
This pin can be used to indicate link activity, link
speed, nINT, or nPME as configured via the LED1
Function Select field of the Wakeup Control and
Status Register (WUCSR).
Note:
Refer to Section 3.8.1, "LEDs" and Sec-
tion 3.8.4, "Wake on LAN (WoL)" for
additional LED information.
Active low interrupt output.
Note:
By default, the nINT signal is output on
the nINT/TXER/TXD4 pin. The nINT
signal can be optionally configured to
output on the LED1 or LED2 pins. Refer
to Section 3.6, "Interrupt Management"
for additional details on device inter-
rupts.
Active low Power Management Event (PME) out-
put.
Note:
The nPME signal can be optionally con-
figured to output on the LED1, LED2, or
RXD2/nPME/nINTSEL pins. Refer to
Section 3.8.4, "Wake on LAN (WoL)" for
additional nPME and WoL information.
This configuration strap is used to disable the inter-
nal 1.2 V regulator. When the regulator is disabled,
external 1.2 V must be supplied to VDDCR.
• When REGOFF is pulled high to VDD2A with
an external resistor, the internal regulator is
disabled.
• When REGOFF is floating or pulled low, the
internal regulator is enabled (default).
See Note 1 for more information on configuration
straps.
Note:
Refer to Section 3.7.4, "REGOFF: Inter-
nal +1.2 V Regulator Configuration" for
additional details.
2013-2015 Microchip Technology Inc.
DS00001987A-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LAN8740A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| LAN8740A | Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver | Microchip |
| LAN8740AI | Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver | Microchip |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |