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PDF DM74LS221 Data sheet ( Hoja de datos )
| Número de pieza | DM74LS221 | |
| Descripción | Dual Non-Retriggerable One-Shot | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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February 1992
DM74LS221 Dual Non-Retriggerable One-Shot
with Clear and Complementary Outputs
General Description
The DM74LS221 is a dual monostable multivibrator with
Schmitt-trigger input Each device has three inputs permit-
ting the choice of either leading-edge or trailing-edge trig-
gering Pin (A) is an active-low trigger transition input and
pin (B) is an active-high transition Schmitt-trigger input that
allows jitter free triggering for inputs with transition rates as
slow as 1 volt second This provides the input with excellent
noise immunity Additionally an internal latching circuit at the
input stage also provides a high immunity to VCC noise The
clear (CLR) input can terminate the output pulse at a prede-
termined time independent of the timing components This
(CLR) input also serves as a trigger input when it is pulsed
with a low level pulse transition ( ) To obtain the best
and trouble free operation from this device please read op-
erating rules as well as the NSC one-shot application notes
carefully and observe recommendations
Features
Y A dual highly stable one-shot
Y Compensated for VCC and temperature variations
Y Pin-out identical to ’LS123 (Note 1)
Y Output pulse width range from 30 ns to 70 seconds
Y Hysteresis provided at (B) input for added noise
immunity
Y Direct reset terminates output pulse
Y Triggerable from CLEAR input
Y DTL TTL compatible
Y Input clamp diodes
Note 1 The pin-out is identical to ’LS123 but functionally it is not refer to
Operating Rules 10 in this datasheet
Functional Description
The basic output pulse width is determined by selection of
an external resistor (RX) and capacitor (CX) Once triggered
the basic pulse width is independent of further input tran-
sitions and is a function of the timing components or it may
be reduced or terminated by use of the active low CLEAR
input Stable output pulse width ranging from 30 ns to 70
seconds is readily obtainable
Connection Diagram
Dual-In-Line Package
TL F 6409 – 1
Order Number DM74LS221M or DM74LS221N
See NS Package Number M16A or N16A
Function Table
Inputs
Outputs
CLEAR
A
B
Q
Q
L
XX
L
H
X
HX
L
H
X
XL
L
H
H Lu
H vH
u LH
H e High Logic Level
L e Low Logic Level
X e Can Be Either Low or High
u e Positive Going Transition
v e Negative Going Transition
e A Positive Pulse
e A Negative Pulse
This mode of triggering requires first the B input be set from a low to high
level while the CLEAR input is maintained at logic low level Then with the B
input at logic high level the CLEAR input whose positive transition from low
to high will trigger an output pulse
TL F 6409 – 2
C1995 National Semiconductor Corporation TL F 6409
RRD-B30M105 Printed in U S A
1 page  
Operating Rules (Continued)
8 Duty cycle is defined as TW T c 100 in percentage if it
goes above 50% the output pulse width will become
shorter If the duty cycle varies between low and high
values this causes output pulse width to vary or jitter (a
function of the REXT only) To reduce jitter REXT should
be as large as possible for example with REXT e 100k
jitter is not appreciable until the duty cycle approaches
90%
9 Under any operating condition CX and RX must be kept
as close to the one-shot device pins as possible to mini-
mize stray capacitance to reduce noise pick-up and to
reduce I-R and Ldi dt voltage developed along their con-
necting paths If the lead length from CX to pins (6) and
(7) or pins (14) and (15) is greater than 3 cm for exam-
ple the output pulse width might be quite different from
values predicted from the appropriate equations A non-
inductive and low capacitive path is necessary to ensure
complete discharge of CX in each cycle of its operation
so that the output pulse width will be accurate
Physical Dimensions inches (millimeters)
10 Although the ’LS221’s pin-out is identical to the ’LS123
it should be remembered that they are not functionally
identical The ’LS123 is a retriggerable device such that
the output is dependent upon the input transitions when
its output ‘‘Q’’ is at the ‘‘High’’ state Furthermore it is
recommended for the ’LS123 to externally ground the
CEXT pin for improved system performance However
this pin on the ’LS221 is not an internal connection to
the device ground Hence if substitution of an ’LS221
onto an ’LS123 design layout where the CEXT pin is
wired to the ground the device will not function
11 VCC and ground wiring should conform to good high-
frequency standards and practices so that switching
transients on the VCC and ground return leads do not
cause interaction between one-shots A 0 01 mF to 0 10
mF bypass capacitor (disk ceramic or monolithic type)
from VCC to ground is necessary on each device Fur-
thermore the bypass capacitor should be located as
close to the VCC-pin as space permits
For further detailed device characteristics and output performance
please refer to the NSC one-shot application note AN-372
16-Lead Small Outline Molded Package (M)
Order Number DM74LS221M
NS Package Number M16A
5
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