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PDF HMC7545 Data sheet ( Hoja de datos )
| Número de pieza | HMC7545 | |
| Descripción | 14.2 Gbps Asynchronous 4-Channel Signal Conditioner | |
| Fabricantes | Analog Devices | |
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Data Sheet
14.2 Gbps Asynchronous
4-Channel Signal Conditioner
HMC7545
FEATURES
8 Gb, 10 Gb, 16 Gb active optical modules
Continuous time linear equalizer (CTLE) with up to 18 dB
equalization
Loss of signal (LOS) detection with programmable threshold
and hysteresis
8 Gb, 10 Gb, 16 Gb active copper cable assemblies
1.5 Gb, 3 Gb, 6 Gb, 12 Gb SAS/SATA
PCIe 1.x, 2.0, 3.0
Broadband and automatic test and measurement
Driver performance
Programmable differential swing: 400 mV p-p differential
to 900 mV p-p differential
Programmable driver output with up to 12 dB de-emphasis
Automatic electrical idle and receiver detection
Output polarity inversion and automatic output squelch
Single supply (2.5 V or 3.3 V)
Low power operation: 80 mW per channel
Per lane power-down options
GENERAL DESCRIPTION
The HMC7545 is a unidirectional, quad-channel, protocol and
data rate agnostic, asynchronous signal conditioner, designed
for short and intermediate range optical modules, line cards,
and backplane applications operating at up to 14.2 Gbps.
Each channel provides programmable input equalization, LOS
and receiver detection, automatic output squelch,
programmable output swing and output de-emphasis.
Flexible configuration interface: pin strap, 2-wire interface,
or EEPROM
All high speed differential inputs and outputs of the HMC7545
are current mode logic (CML), terminated on-chip with 50 Ω to
APPLICATIONS
the positive supply, and can be dc-coupled or ac-coupled.
QSFP+ direct attach active copper modules
10 Gb, 40 Gb Ethernet and OTN line cards
The device uses a single supply, 2.5 V or 3.5 V, and its typical
power dissipation is less than 80 mW per channel.
10 Gb, 40 Gb backplane drivers
8 Gb, 16 Gb Fibre Channel and InfiniBand® EDR line cards
and backplane drivers
The HMC7545 is packaged in a 36-lead, 4 mm × 7 mm LFCSP
package and operates from −40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
VCCI
VCCO
IN0P
TO
IN3P
IN0N
TO
IN3N
RX_EQ1
RX_EQ0
VCCI
LOS
DETECT
CTLE
LIMITING
AMP
INVERT
Rx
DETECT
DE-
EMPHASIS
VCCO
OUT0P
TO
OUT3P
OUT0N
TO
OUT3N
TXDOUT
TX_EQ1
TX_EQ0
TWI_MST/SLV
TWISEL
SCK
SDA
RESET
SQUELCH
2-WIRE
INTERFACE
CONTROL
LOGIC
EEPROM_DONE
GND
Figure 1.
Rev. Sp0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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