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PDF ADV3229 Data sheet ( Hoja de datos )
| Número de pieza | ADV3229 | |
| Descripción | 8 x 8 Analog Crosspoint Switch | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
750 MHz, 8 × 8 Analog Crosspoint Switch
ADV3228/ADV3229
FEATURES
8 × 8 high speed, nonblocking switch array
Pinout and functionally equivalent to the AD8108/AD8109
Drop-in compatible with ADV3224/ADV3225 16 × 8 array
Complete solution
Buffered inputs
Programmable high impedance outputs
8 output amplifiers, G = +1 (ADV3228), G = +2 (ADV3229)
Drives 150 Ω loads
Operates on ±5 V supplies
Low power: 0.5 W
Excellent ac performance
−3 dB bandwidth
200 mV p-p: 1200 MHz (ADV3228), 900 MHz (ADV3229)
2 V p-p: 750 MHz (ADV3228), 850 MHz (ADV3229)
0.5 dB flatness (2 V p-p): 250 MHz (ADV3228), 235 MHz
(ADV3229)
Slew rate: 2500 V/µs
Serial or parallel programming of switch array
72-lead LFCSP (10 mm × 10 mm)
CLK
DATAIN
UPDATE
CE
RESET
FUNCTIONAL BLOCK DIAGRAM
SER/PAR D0 D1 D2 D3
A0
A1
A2
40-BIT SHIFT REGISTER
WITH 4-BIT
PARALLEL LOADING
DATAOUT
32 8 (RESERVED)
PARALLEL LATCH
32
DECODE
8 × 4:8 DECODERS
SET INDIVIDUAL
OR RESET ALL
OUTPUTS TO OFF
8
ADV3228/
ADV3229
OUTPUT
64
BUFFER
G = +1,
G = +2
SWITCH
APPLICATIONS
Routing of high speed signals including
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Data communications
Telecommunications
Figure 1.
GENERAL DESCRIPTION
The ADV3228/ADV3229 are high speed 8 × 8 analog crosspoint
switch matrices. They offer a −3 dB large signal bandwidth of
750 MHz (ADV3228) and a slew rate of 2500 V/µs.
The ADV3228/ADV3229 include eight independent output buffers
that can be placed into a high impedance state for paralleling
crosspoint outputs to prevent off channels from loading the output
bus. The ADV3228 has a gain of +1, the ADV3229 has a gain of
+2, and they both operate on voltage supplies of ±5 V. Channel
switching is performed via a serial digital control that can
accommodate daisy chaining of several devices or via a parallel
control to allow updating of an individual output without
reprogramming the entire array.
The ADV3228/ADV3229 are available in the 72-lead LFCSP
package over the extended industrial temperature range of
−40°C to +85°C.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2010–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
TIMING CHARACTERISTICS (SERIAL)
Table 2.
Parameter
Serial Data Setup Time
CLK Pulse Width
Serial Data Hold Time
CLK Pulse Separation, Serial Mode
CLK to UPDATE Delay
UPDATE Pulse Width
CLK to DATAOUT Valid, Serial Mode
Propagation Delay, UPDATE to Switch On or Off
Data Load Time, CLK = 5 MHz, Serial Mode
CLK, UPDATE Rise and Fall Times
RESET Time
Timing Diagram—Serial Mode
1
CLK
0
t2
t1 t3
1
DATAIN
0
OUT07 (D3)
1 = LATCHED
UPDATE
0 = TRANSPARENT
t7
DATAOUT
ADV3228/ADV3229
Symbol
t1
t2
t3
t4
t5
t6
t7
Min Typ Max Unit
10 ns
10 ns
10 ns
10 ns
10 ns
10 ns
50 ns
20 ns
8 µs
50 ns
30 ns
t4
LOAD DATA INTO
SERIAL REGISTER
ON FALLING EDGE
OUT07 (RESERVED)
OUT00 (D0)
t5 t6
TRANSFER DATA FROM SERIAL
REGISTER TO PARALLEL
LATCHES DURING LOW LEVEL
Figure 2. Timing Diagram, Serial Mode
LOGIC LEVELS
Table 3. Logic Levels
VIH VIL
RESET,
SER/PAR, CLK,
DATA IN, CE,
UPDATE
RESET,
SER/PAR, CLK,
DATA IN, CE,
UPDATE
2.0 V min
0.8 V max
VOH
DATA OUT
2.4 V min
VOL
DATA OUT
0.4 V max
IIH
SER/PAR,
CLK, DATA IN,
CE, UPDATE
2 µA max
IIL
SER/PAR,
CLK, DATA IN,
CE, UPDATE
2 µA max
IIH
RESET
2 µA max
IIL
RESET
300 µA max
IOH
DATA OUT
3 mA min
IOL
DATA OUT
1 mA min
Rev. A | Page 5 of 24
5 Page 
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
4
3
OUTPUT SIGNAL, UNICAST
OUTPUT SIGNAL, BROADCAST
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
–11 VOUT = 200mV p-p
–12
1 10
100
1000
10000
FREQUENCY (MHz)
Figure 7. ADV3228 Small Signal Frequency Response
4
3
OUTPUT SIGNAL, UNICAST
OUTPUT SIGNAL, BROADCAST
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
–11 VOUT = 2V p-p
–12
1 10
100
FREQUENCY (MHz)
1000
10000
Figure 8. ADV3228 Large Signal Frequency Response
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9 VOUT = 200mV p-p
–10
1 10
10.4pF
5.2pF
2.2pF
1.2pF
0pF
100
1000
10000
FREQUENCY (MHz)
Figure 9. ADV3228 Small Signal Frequency Response with Capacitive Loads
ADV3228/ADV3229
10
9 OUTPUT SIGNAL, UNICAST
8 OUTPUT SIGNAL, BROADCAST
7
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9 VOUT = 200mV p-p
–10
1 10
100
1000
10000
FREQUENCY (MHz)
Figure 10. ADV3229 Small Signal Frequency Response
10
9
8
OUTPUT SIGNAL, UNICAST
OUTPUT SIGNAL, BROADCAST
7
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9 VOUT = 2V p-p
–10
1 10
100
FREQUENCY (MHz)
1000
10000
Figure 11. ADV3229 Large Signal Frequency Response
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6
–7
–8
–9 VOUT = 200mV p-p
–10
1 10
10.4pF
5.2pF
2.2pF
1.2pF
0pF
100
1000
10000
FREQUENCY (MHz)
Figure 12. ADV3229 Small Signal Frequency Response, RL = 150 Ω
Rev. A | Page 11 of 24
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet ADV3229.PDF ] | |
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