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PDF IMP5121 Data sheet ( Hoja de datos )
| Número de pieza | IMP5121 | |
| Descripción | 27-Line Plug and Play SCSI Terminator | |
| Fabricantes | IMP | |
| Logotipo |  |
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IMP5121
DATA COMMUNICATIONS
27-Line Plug and Play
SCSI Terminator
The 27-channel IMP5121 SCSI terminator is part of IMP's family of high-
performance SCSI terminators that deliver true UltraSCSI performance.
The BiCMOS design offers superior performance over first generation
linear regulator/resistor based terminators.
IMP's new architecture employs high-speed adaptive elements for each
channel, thereby providing the fastest response possible - typically
35MHz, which is 100 times faster than the older linear regulator termi-
nator approach. The bandwidth of terminators based on the older
regulator/resistor terminator architecture is limited to 500kHz since a
large output stabilization capacitor is required. The IMP architecture
eliminates the external output compensation capacitor and the need
for transient output capacitors while maintaining pin compatibility
with first generation designs. Reduced component count is inherent
with the IMP5121.
Key Features
x SCSI Plug and Play
— Host bus adapter with 3 SCSI connectors
x Ultra-Fast response for Fast-20 SCSI
x Split disconnect for mixing 16-bit (wide) or
8-bit (narrow) buses
x 35MHz channel bandwidth
x Sleep-mode current less than 150µA
x NO external compensation capacitors
x Compatible with active negation drivers
x Hot swap compatible
x Superior replacement for the LX5121 and
UCC5621
The IMP5121 architecture tolerates marginal system designs. A key
improvement offered by the IMP5121 lies in its ability to insure reliable,
error-free communications even in systems which do not adhere to rec-
ommended SCSI hardware design guidelines, such as improper cable
lengths and impedance. Frequently, this situation is not controlled by the
peripheral or host designer.
For Host Bus Adapters and three SCSI connectors, the
IMP5121 has multiple disable pins for Plug and Play SCSI
capability. It also splits the upper nine termination lines for
mixing 16-bit (wide) and 8-bit (narrow) buses with minimal
board trace capacitance.
For portable and configurable peripherals, the IMP5121 can be placed in
a sleep mode with TTL compatible signals. Quiescent current is less than
150µA when disabled.
Block Diagrams
VTERM
Term Power
Current
Biasing
Circuit
DISCONNECT 1
DISCONNECT 2
Enable
Logic
VTERM
1.4V
–
+
24mA Current
Limiting Circuit
2.85V
DATA OUTPUT
PIN DB (0)
1 of 27 Channels
5121_01.eps
Daily Silver IMP
www.ds-imp.com.cn
1
1 page  
IMP5121
Application Information
Table 1. Power Up/ Power Down Function Table
DISCONNECT 1 DISCONNECT 2
W1
W2
N1 T1-T18 T19-T27
H
L
DC
DC
DC
Enabled
Disabled
L
H
DC
DC
DC
Disabled
Enabled
L
L
DC
DC
DC
Disabled
Disabled
H
H
H
H
H
Enabled
Enabled
H
H
H
H
L
Enabled
Enabled
H
H
H
L
H
Enabled
Enabled
H
H
H
L
L
Disabled
Enabled
H
H
L
H
H
Enabled
Enabled
H
H
L
H
L
Disabled
Enabled
H
H
L
L
H
Disabled
Disabled
H
H
L
L
L
Disabled
Disabled
5121_t04.eps
For Plug and Play SCSI auto-termination
disabling, connect pin 50 of the External Wide
SCSI connector to W1 of the IMP5121,
connect pin 50 of the Internal Wide SCSI
connector to W2 of the IMP5121, and connect
pin 22 of the Internal Narrow connector to N1
of the IMP5121.
Internal Narrow
Internal Wide
IMP5121
External
Wide
Figure 4. Plug and Play Diagram
5121_05.eps
Daily Silver IMP
Data Communications
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet IMP5121.PDF ] | |
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