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PDF IMP5111 Data sheet ( Hoja de datos )
| Número de pieza | IMP5111 | |
| Descripción | 9-Line SCSI Terminator | |
| Fabricantes | IMP | |
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Hay una vista previa y un enlace de descarga de IMP5111 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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IMP5111/5112
DATA COMMUNICATIONS
9-Line SCSI Terminator
– 35MHz Channel Bandwidth
The 9-channel IMP5111/5112 SCSI terminator is part of IMP's family
of high-performance SCSI terminators that deliver true UltraSCSI per-
formance. The BiCMOS design offers superior performance over first
generation linear regulator/resistor based terminators.
IMP's new architecture employs high-speed adaptive elements for each
channel, thereby providing the fastest response possible - typically
35MHz, which is 100 times faster than the older linear regulator termi-
nator approach. The bandwidth of terminators based on the older
regulator/resistor terminator architecture is limited to 500kHz since a
large output stabilization capacitor is required. The IMP architecture
eliminates the external output compensation capacitor and the need
for transient output capacitors while maintaining pin compatibility
with first generation designs. Reduced component count is inherent
with the IMP5111/5112.
The IMP5111/5112 architecture tolerates marginal system designs. A key
improvement offered by the IMP5111/5112 lies in its ability to insure
reliable, error-free communications even in systems which do not adhere
to recommended SCSI hardware design guidelines, such as improper
cable lengths and impedance. Frequently, this situation is not controlled
by the peripheral or host designer.
For portable and configurable peripherals, the IMP5111/5112 can be
placed in a sleep mode with a disconnect signal. Quiescent current is less
than 275µA when disabled. When disabled, the outputs are in a high
impedance state with output capacitance less than 3pF.
Key Features
x Ultra-Fast response for Fast-20 SCSI applications
x 35MHz channel bandwidth
x 3.3V operation
x Less than 3pF output capacitance
x Sleep-mode current less than 275µA
x Thermally self limiting
x No external compensation capacitors
x Implements 8-bit or 16-bit (wide) applications
x Compatible with active negation drivers
(60mA/channel)
x Compatible with passive and active terminations
x Approved for use with SCSI 1, 2, 3 and UltraSCSI
x Hot swap compatible
x Pin-for-pin compatible with LX5211 and
UC5606 (IMP5111)
x Pin-for-pin compatible with LX5212 and
UC5603/5613/5614 (IMP5112)
Block Diagrams
Term Power
Thermal
Limiting
Circuit
DISCONNECT (IMP5111)
DISCONNECT (IMP5112)
1.4V
–
+
Daily Silver IMP
Current
Biasing
Circuit
24mA Current
Limiting Circuit
2.85V
DATA OUTPUT
PIN DB (0)
1 of 9 Channels
www.ds-imp.com.cn
5111/5112_01.eps
1
1 page  
IMP5111/5112
Package Dimensions
SO (16-Pin)
EH
D
e
A
C
B
A1
TSSOP (24-Pin)
123
D
F
EP
E
M
L
16-Pin (SO).eps
Inches
Millimeters
Min Max Min Max
SO (16-Pin)*
A 0.053
0.069
1.35
1.75
A1 0.004
0.010
0.10
0.25
B 0.014
0.018
0.35
0.46
C 0.007
0.010
0.19
0.25
D 0.385
0.394
9.78
10.01
E 0.150
0.158
3.81
4.01
e 0.050 BSC
1.27 BSC
H 0.228
0.244
5.79
6.20
L 0.016
0.050
0.40
1.27
M 0° 8° 0° 8°
TSSOP (24-Pin)
A 0.032
0.041
0.80
1.05
B 0.007
0.012
0.19
0.30
C 0.0035
0.0071
0.09
0.180
D 0.303
0.311
7.70
7.90
E 0.169
0.176
4.30
4.48
F 0.025 BSC
0.65 BSC
G 0.002
0.005
0.05
0.15
H—
0.0433
—
1.10
L 0.020
0.028
0.50
0.70
M 0° 8° 0° 8°
P 0.246
0.256
* JEDEC Drawing MS-012AC
6.25
6.50
5111/5112_t06.at3
SEATING PLANE B
AH
G
L
M
C
24-Pin (TSSOP).eps
Daily Silver IMP
Data Communications
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet IMP5111.PDF ] | |
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