74HC131 Datasheet PDF - Hitachi Semiconductor
| Part Number | 74HC131 | |
| Description | 3-to-8-line Decoder/Demultiplexer | |
| Manufacturers | Hitachi Semiconductor | |
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HD74HC131
3-to-8-line Decoder/Demultiplexer with Edge-Triggered
Address Registers
Description
The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A,B,C) and D type register.
Address select data store to D type registers, during the positive going transition of the clock pulse.
Output control (G 1, G2) are independent of select input and CLK input, and when G1 is low or G2 = High,
all outputs is high.
Features
• High Speed Operation: tpd (CLK to Y) = 20 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 V to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
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HD74HC131
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Item
Symbol
Propagation delay tPLH
time
t PHL
VCC (V)
2.0
4.5
6.0
Min Typ Max Min
— — 210 —
— 20 42 —
— — 36 —
Max Unit
265 ns
53
45
tPLH 2.0 — — 140 — 175 ns
tPHL 4.5 — 15 28 — 35
6.0 — — 24 — 30
Pulse width tw 2.0 80 — — 100 — ns
4.5 16 5 — 20 —
6.0 14 — — 17 —
Setup time
tsu 2.0 50 — — 65 — ns
4.5 10 2 — 13 —
6.0 9 — — 11 —
Hold time
th 2.0 5 — — 5 — ns
4.5 5 –1 — 5 —
6.0 5 — — 5 —
Output rise/fall
time
t TLH
t THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
Test Conditions
CLK to Y
G1 or G2 to Y
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for 74HC131 electronic component. |
| Information | Total 8 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ 74HC131.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| 74HC131 | The function is 3-to-8-line Decoder/Demultiplexer. Hitachi Semiconductor | |
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| 74HC132 | The function is Quad 2-input NAND Schmitt trigger. Philips | |
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