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VS23S010C-S fiches techniques PDF

VLSI - 1 Megabit SPI SRAM

Numéro de référence VS23S010C-S
Description 1 Megabit SPI SRAM
Fabricant VLSI 
Logo VLSI 





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VS23S010C-S fiche technique
VS23S010C-S Datasheet
VS23S010C-S - 1 Megabit SPI SRAM
with Dual-I/O and Quad-I/O
Features
Flexible 1.5V - 3.6V operating voltage
131,072 x 8-bit SRAM organization
Serial Peripheral Interface (SPI) mode
0 compatible
Byte, Page and Sequential modes
Supports Single, Dual and Quad
I/O read and write
Fast operation: the whole mem-
ory can be filled in 262158 or read
in 262159 cycles (Quad-I/O SPI,
Quad address mode)
XCS
SO/IO1
XWP/IO2
GND
1
2
3
4
8 VCC
7 XHOLD/IO3
6 SCLK
5 SI/IO1
Figure 1: SOIC8 narrow package, compatible
with standard pin out (not to scale).
Operating Modes
XHOLD and XWP pins
High operating frequencies
Up to 36 MHz for SPI
Active Low-power
Read current 200 µA at 1 MHz (Sin-
gle I/O, SO=0, TA=+85C, VDD=3.3V)
Industrial temperature range
-40C to + 85C
Pb-Free and RoHS compliant
1,048,576 bit
(128K x 8)
SRAM
Array
Description
The VLSI Solution VS23S010C-S is an easy-
to-use and versatile serial SRAM device. The
memory is accessed via an SPI compatible
serial bus.
Applications
Microcontroller RAM extension
VoIP and internet data stream buffer
Audio data buffer
SPI
Serial Interface
Figure 2: VS23S010C-S blocks
In SPI mode SRAM and control registers can
be accessed. Dual-I/O and Quad-I/O modes
are used only for SRAM read and write.
Following are connection examples for differ-
ent operating modes. Some I/Os of VS23S010C-
S are unconnected, because they have inter-
nal pull-up or pull-down resistors. Note also,
Version: 0.9 [Preliminary], 2015-01-16
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