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PDF VS1005g Data sheet ( Hoja de datos )
| Número de pieza | VS1005g | |
| Descripción | Audio Processing Platform IC | |
| Fabricantes | VLSI | |
| Logotipo |  |
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VS1005g Datasheet
VS1005g - Audio Processing Platform IC
Analog Hardware Features
• Three channels of 24-bit audio ADC
• Two 24-bit audio DACs
• Stereo earphone driver for 30 Ω load
• Internal microphone amplifiers
• Stereo FM radio receiver with RDS
• 10-bit ADC, 3-5 external inputs
• Operation from single power supply,
four programmable internal regulators
Applications
• Portable recorders
• Digital docking stations
• MP3 players
• Internet radio
• Wireless headphones
• Audio co-processor
Overview
Digital Hardware Features
• 100 MIPS VS_DSP4 processor core
• 128 KiB program RAM (32 KiWord)
• 128 KiB data RAM (2×32 KiWord)
• Protected 8 Mi-bit FLASH (Optional)
VS1005g is a flexible audio platform device.
It is built around VS_DSP4, which is a power-
ful DSP (Digital Signal Processor) core, and
runs VLSI Solution’s proprietary DSP-oriented,
multitasking VSOS operating system.
• USB 2.0 Hi-Speed (480 Mbit/s)
Device / Host
• I2S and SPDIF digital audio interfaces
• NAND FLASH interface with EEC
• SD Card interface
• 2 SPI bus interfaces
• 10BaseT Ethernet controller
• UART interface
• All digital pins are user configurable for
general purpose IO
VS1005g’s digital interfaces provide flexible
access to external devices in standalone ap-
plications, and flexible digital audio data in-
puts and outputs when the device is used as
an audio signal processor in complex sys-
tems. The analog interfaces provide high-
quality audio inputs and outputs, and the con-
trol ADC can be used for example for interfac-
ing a resistive touch panel.
• Flexible clock selection, default opera-
tion from 12.288 MHz
• Internal PLL clock multiplier for digital
logic
• RTC with battery backed memory
• Reed-Solomon error correction
• HW debug support with VSIDE via JTAG
VS1005g has an embedded FLASH mem-
ory of 8 Mi-bits (1 MiByte) for customization
by VLSI, customers or third parties. The firm-
ware and hardware are designed to prevent
access to the embedded FLASH in protected
mode. After FLASH memory programming
VS1005g can be booted from it as a fully cus-
Firmware and VSOS Features
tomized stand-alone audio processor.
VS1005g is offered in six different variants
• Decoders: MP3, WMA, Ogg Vorbis, AAC, (see Chapter 4 for details).
AAC, FLAC, WAV PCM
• Encoders: MP3, Ogg Vorbis, WAV PCM
• File I/O for SD cards and NAND flash
• FM tuner and RDS decoder
• USB host and slave libraries
• Graphical display with resistive touch panel
• Extensive audio DSP library
• IP stack of Ethernet
• Flexible boot options
• Pre-emptive multitasking
• Easy-to-write software interface with VSIDE
Note: All VSOS features not available yet.
Version: 0.63, 2014-12-19
1
1 page  
VS1005g Datasheet
CONTENTS
11.10 SPI Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
11.11 Common Data Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
11.11.1 Ethernet Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
11.11.2 Reed-Solomon Codec . . . . . . . . . . . . . . . . . . . . . . . . . . 78
11.11.3 Nand Flash Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
11.11.4 SD Card Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
11.12 USB Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
11.12.1 USB Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . . 87
11.12.2 USB Clocking Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
11.12.3 USB Host . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
11.13 Interruptable General Purpose IO Ports 0-2 . . . . . . . . . . . . . . . . . . . . 91
11.14 S/PDIF Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
11.14.1 S/PDIF Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
11.14.2 S/PDIF Receiver Registers . . . . . . . . . . . . . . . . . . . . . . . . 94
11.14.3 S/PDIF Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
11.14.4 S/PDIF Transmitter Registers . . . . . . . . . . . . . . . . . . . . . . 97
11.15 UART Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
11.15.1 UART Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . . 100
11.16 Watchdog Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
11.16.1 Watchdog Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
11.17 I2S Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
11.17.1 I2S Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . . . 103
11.18 Timer Peripheral . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
11.18.1 Timer Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . . 105
11.19 Real Time Clock (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
11.19.1 RTC Peripheral Registers . . . . . . . . . . . . . . . . . . . . . . . . 107
11.20 10-Bit Successive Approximation Register Analog-to-Digital Converter (SAR) . 109
11.21 Pulse Width Modulation Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
11.22 Special Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
11.22.1 Software Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Version: 0.63, 2014-12-19
5
5 Page 
VS1005g Datasheet
5 CHARACTERISTICS & SPECIFICATIONS
5.3 Analog Characteristics of Audio Outputs
Unless otherwise noted: AVDD=3.6 V, CVDD=1.8 V, IOVDD=2.8 V, Vref =1.6 V, TA=+25◦C,
XTALI=12 MHz, Internal Clock Multiplier 3.0×. DAC tested with full-scale output sinewave, mea-
surement bandwidth 20..20000 Hz, analog output load: LEFT to CBUF 30 Ω, RIGHT to CBUF
30 Ω. Microphone test amplitude 50 mVpp, f=1 kHz, Line input test amplitude 2.2 Vpp, f=1 kHz.
FM test signal input level -70 dBm, deviation 75 kHz, pre-emphasis 50 µs, f=1 kHz.
DAC Characteristics
Parameter
Symbol
DAC Resolution
Dynamic range (DAC unmuted, A-weighted, min gain) IDR
S/N ratio (full scale signal, no load)
SNR
S/N ratio (full scale signal, 30 ohm load)
SNRL
Total harmonic distortion, -3dB level, no load
THD
Total harmonic distortion, -3dB level, 30 ohm load
THDL
Crosstalk (L/R to R/L), 30 ohm load, without CBUF 1 XTALK1
Crosstalk (L/R to R/L), 30 ohm load, with CBUF
XTALK2
Gain mismatch (L/R to R/L)
GERR
Frequency response
AERR
Full scale output voltage
LEVEL
Deviation from linear phase
PH
Analog output load resistance
AOLR
Analog output load capacitance
AOLC
DC level, Vref =1.2 V (CBUF, LEFT, RIGHT)
DC level, Vref =1.6 V (CBUF, LEFT, RIGHT)
CBUF disconnect current (short-circuit protection)
Min
-0.5
-0.05
1.1
1.5
Typ
24
100
92
90
0.01
0.05
-75
-54
1.0
0
302
130
Max
0.5
0.05
5
1003
1.3
1.7
200
Unit
bits
dB
dB
dB
%
%
dB
dB
dB
dB
Vrms
◦
Ω
pF
V
V
mA
1 Loaded from Left/Right pin to analog ground via 100 µF capacitors.
2 AOLR may be lower than Typical, but distortion performance may be compromised. Also,
there is a maximum current that the internal regulators can provide.
3 CBUF must have external 10 Ω + 47 nF load, LEFT and RIGHT must have external 20 Ω +
10 nF load for optimum stability and ESD tolerance.
Version: 0.63, 2014-12-19
11
11 Page | ||
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| PDF Descargar | [ Datasheet VS1005g.PDF ] | |
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