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PDF ADXRS290 Data sheet ( Hoja de datos )
| Número de pieza | ADXRS290 | |
| Descripción | Dual-Axis MEMS Gyroscope | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
FEATURES
MEMS pitch and roll rate gyroscope
Ultralow noise: 0.004°/s/√Hz
High vibration rejection over a wide frequency range
Power saving standby mode
80 µA current consumption in standby mode
Fast startup time from standby mode: <100 ms
Low delay of <0.5 ms for a 30 Hz input at the widest
bandwidth setting
Serial peripheral interface (SPI) digital output
Programmable high-pass and low-pass filters
2000 g powered acceleration survivability
2.7 V to 5.0 V operation
−25°C to +85°C operation
4.5 mm × 5.8 mm × 1.2 mm cavity laminate package
APPLICATIONS
Optical image stabilization
Platform stabilization
Wearable products
Ultralow Noise,
Dual-Axis MEMS Gyroscope
ADXRS290
GENERAL DESCRIPTION
The ADXRS290 is a high performance MEMS pitch and roll
(dual-axis in-plane) angular rate sensor (gyroscope) designed
for use in stabilization applications.
The ADXRS290 provides an output full-scale range of ±100°/s with
a sensitivity of 200 LSB/°/s. Its resonating disk sensor structure
enables angular rate measurement about the axes normal to the
sides of the package around an in-plane axis. Angular rate data
is formatted as 16-bit twos complement and is accessible through
a SPI digital interface. The ADXRS290 exhibits a low noise floor
of 0.004°/s/√Hz and features programmable high-pass and low-
pass filters.
The ADXRS290 is available in a 4.5 mm × 5.8 mm × 1.2 mm,
18-terminal cavity laminate package.
FUNCTIONAL BLOCK DIAGRAM
SYNC/ASEL PDMY PDMX AST VDD I/O CP VREG VS
PITCH
ROLL
DEMOD
ADC
DEMOD
ADC
ADXRS290
PLL
POWER
MANAGEMENT
FILTERS CONTROL LOGIC
DIGITAL
SERIAL
INPUT/OUTPUT
MECHANICAL
SENSOR
DRIVE
PITCH
ROLL
VELOCITY
GND
MOSI
MISO
SCLK
CS
Figure 1.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADXRS290
54 321
PDMY 6
CS 7
MISO 8
ADXRS290
TOP VIEW
(TERMINAL SIDE DOWN)
Not to Scale
MOSI 9
10 11 12 13 14
18 VS
17 VREG
16 GND
15 GND
Figure 3. Pin Configuration (Top View)
Table 4. Pin Function Descriptions
Description
Pin No. Mnemonic
Digital Mode
Analog Evaluation Mode
1 VREG Regulator Output. Connect a 1 µF capacitor to this pin. Regulator Output. Connect a 1 µF capacitor to this pin.
2
VDD I/O
Digital Interface Supply Voltage.
Digital Interface Supply Voltage.
3 AST This pin is internally pulled to ground.
Self Test.
4
SENS
This pin is internally pulled to ground.
Sensitivity Select.
5
PDMX
This pin is internally pulled to ground.
6
PDMY
This pin is internally pulled to ground.
Pulse-Density Modulation (PDM) XOUT.
PDM YOUT.
7 CS
Chip Select. Active low.
Chip Select. Active low.
8 MISO (SDO) Serial Data Out.
Serial Data Out.
9 MOSI (SDI) Serial Data In.
Serial Data In.
10 SCLK Serial Communications Clock.
Serial Communications Clock.
11 SYNC/ASEL Data Ready Out (SYNC). Connect this pin to ground if Analog Enable (ASEL).
it is not used.
12 CP
Charge Pump Output. Connect a 1 µF capacitor (rated Charge Pump Output. Connect a 1 µF capacitor (rated
for 50 V) to this pin.
for 50 V) to this pin.
13, 15, 16 GND
Ground. Connect to ground.
Ground. Connect to ground.
14 VS
Analog Supply Voltage.
Analog Supply Voltage.
17 VREG
18 VS
Regulator Output. Connect a 1 µF capacitor to this pin. Regulator Output. Connect a 1 µF capacitor to this pin.
Analog Supply Voltage.
Analog Supply Voltage.
Rev. A | Page 5 of 19
5 Page 
Data Sheet
ADXRS290
APPLICATIONS INFORMATION
APPLICATION CIRCUIT
The ADXRS290 application circuit is shown in Figure 24. The
primary communications port is the 4-wire SPI interface. For
this device, external pull-up/pull-down resistors are not required
for the SPI interface, and these pins can be connected directly to
the system microcontroller. Four capacitors are required for
proper operation of the device. For optimum device performance,
separate the capacitors placed on the VS, VDDI/O, VREG, and CP pins.
2.7V TO
5.25V
CS
1µF
2.7V TO
5.25V
CI/O
1µF
CREG
1µF
VREG
VDD I/O
AST
SENS
PDMX
1 14
2 ADXRS290 13
TOP VIEW
(TERMINAL SIDE DOWN)
3
Not to Scale
12
4 11
5 10
VS
GND
CP CCP
1µF
50V
SYNC/ASEL
SCLK
SPI BUS
Figure 24. Recommended Application Circuit
POWER SUPPLY DECOUPLING
In many applications, bypass capacitors at VS, VREG, and VDD I/O
(as shown in Figure 24) placed close to the ADXRS290 supply
pins adequately decouple the gyroscope from noise on the power
supply. However, in applications where noise is present at the
internal clock frequency, or any harmonic thereof, additional
care in power supply bypassing is required because this noise
may cause errors in angular rate measurement. If additional
decoupling is necessary, a 10 Ω resistor or ferrite bead in series
with VS and an additional larger bypass capacitor (2.2 µF or
greater) at VS may be helpful.
Ensure that the connection from the ADXRS290 ground to
the power supply ground be low impedance because noise
transmitted through ground has an effect similar to noise
transmitted through VS.
POWER SEQUENCING
The interface voltage level is set with the interface supply voltage
VDD I/O, which must be present to ensure that the ADXRS290
does not create a conflict on the communications bus. For single-
supply operation, VDDI/O can be the same as the main supply (VS).
Conversely, in a dual-supply application, VDD I/O can differ from
VS to accommodate the desired interface voltage. When VS is
applied, the device enters standby state, where power consumption
is minimized, and the device waits for VDD I/O to be applied and
for a command to enter measurement mode. Measurement mode
is activated by setting Bit B1 in Register 0x10 (POWER_CTL).
Clear this bit to return the device to a standby state.
In standby mode, the current consumption is reduced to 80 µA
(typical). In standby mode, only single-address SPI transactions
are performed, which includes reading from or writing to a single
register, but does not include writing to or reading from several
registers in one command. In standby mode, the gyroscope does
not respond to rate outputs. Transition time to measurement mode
where offsets settle to within ±1°/s of the final value is <100 ms.
SETTING BANDWIDTH
The ADXRS290 includes an internal configurable band-pass filter.
Both the high-pass and low-pass poles of the filter are adjustable, as
shown in Table 5 and Table 6. The filter frequency response is
shown in Figure 25 and Figure 26. The group delay of the
wideband filter option is less than 0.5 ms (see Figure 18 for filter
delay). At power-up, the default condition for the filters is dc for
the high-pass filter and 480 Hz for the low-pass filter.
Table 5. Low-Pass Filter Pole Locations
Bit 2 Filter Bit 1 Filter Bit 0 Filter Frequency (Hz)
0 0 0 480 (Default)
0 0 1 320
0 1 0 160
0 1 1 80
1 0 0 56.6
1 0 1 40
1 1 0 28.3
1 1 1 20
Table 6. High-Pass Filter Pole Locations
Bit 7
Bit 6
Bit 5
Bit 4
Filter
Filter
Filter
Filter
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
Frequency
(Hz)
All pass
(default)
0.011
0.022
0.044
0.087
0.175
0.350
0.700
1.400
2.800
11.30
Rev. A | Page 11 of 19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet ADXRS290.PDF ] | |
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